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Mon, 01 Apr 2024 16:51:16 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 02 Apr 2024 02:51:14 +0300 Subject: [PATCH v3 3/4] drm/mipi-dsi: add mipi_dsi_compression_mode_ext() MIME-Version: 1.0 Message-Id: <20240402-lg-sw43408-panel-v3-3-144f17a11a56@linaro.org> References: <20240402-lg-sw43408-panel-v3-0-144f17a11a56@linaro.org> In-Reply-To: <20240402-lg-sw43408-panel-v3-0-144f17a11a56@linaro.org> To: Sumit Semwal , Caleb Connolly , Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3789; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=WTwI7tKciTN5NWHCt4BqSsgA7bUxADqHjwO+LN7NrqI=; b=owEBbAGT/pANAwAKAYs8ij4CKSjVAcsmYgBmC0hwJvacY4ehW/Ceu7lfTrySVrrn13d1CLQyM ZRQJ/KbnwuJATIEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgtIcAAKCRCLPIo+Aiko 1U7vB/dh2BGQN/Mm6O0WkvrdCXjfTFIvnx8fEkf+KBWt4phogk6quGH/qbIOx9BrjKb4QLG6o4d 4nwaEtlFEsxntWlts4n04MRDmIkj0l8f61WG0D+3V5oIOlYbUqHqkRLfZkvKamNMRQWpJJ8w8IG oo+FwMm0BRsWdv6jKZS7NSgbIUeL3ujuwobCdeuKSnZBioObB00bmPsSVBM7nms6EYGdHyMBLoC EXRijraGYfsQL9Z90AA/vFsQRYUkCvJxrfS2nc5adbnFzDjZBCP550wPMIY5KP6y7tQmK9Q1TQF HO6tLOu8r16FqZIE5SDgVR3K1++eJqWJF0wesdt87aomAHc= X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the extended version of mipi_dsi_compression_mode(). It provides a way to specify the algorithm and PPS selector. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dsi.c | 33 +++++++++++++++++++++++++++------ include/drm/drm_mipi_dsi.h | 9 +++++++++ 2 files changed, 36 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 9874ff6d4718..0ecbc811eb7a 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -645,19 +645,24 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); /** - * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * mipi_dsi_compression_mode_ext() - enable/disable DSC on the peripheral * @dsi: DSI peripheral device * @enable: Whether to enable or disable the DSC + * @algo: Selected algorithm + * @pps_selector: The PPS selector * - * Enable or disable Display Stream Compression on the peripheral using the - * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * Enable or disable Display Stream Compression on the peripheral. * * Return: 0 on success or a negative error code on failure. */ -int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector) { - /* Note: Needs updating for non-default PPS or algorithm */ - u8 tx[2] = { enable << 0, 0 }; + u8 data = (enable << 0) | + (algo << 1) | + (pps_selector << 4); + u8 tx[2] = { data, 0 }; struct mipi_dsi_msg msg = { .channel = dsi->channel, .type = MIPI_DSI_COMPRESSION_MODE, @@ -668,6 +673,22 @@ int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) return (ret < 0) ? ret : 0; } +EXPORT_SYMBOL(mipi_dsi_compression_mode_ext); + +/** + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * @dsi: DSI peripheral device + * @enable: Whether to enable or disable the DSC + * + * Enable or disable Display Stream Compression on the peripheral using the + * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * + * Return: 0 on success or a negative error code on failure. + */ +int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +{ + return mipi_dsi_compression_mode_ext(dsi, enable, 0, MIPI_DSI_COMPRESSION_DSC); +} EXPORT_SYMBOL(mipi_dsi_compression_mode); /** diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 3011d33eccbd..78cb7b688b1d 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -226,6 +226,12 @@ static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt) return -EINVAL; } +enum mipi_dsi_compression_algo { + MIPI_DSI_COMPRESSION_DSC = 0, + MIPI_DSI_COMPRESSION_VENDOR = 3, + /* other two values are reserved, DSI 1.3 */ +}; + struct mipi_dsi_device * mipi_dsi_device_register_full(struct mipi_dsi_host *host, const struct mipi_dsi_device_info *info); @@ -242,6 +248,9 @@ int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi); int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, u16 value); int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable); +int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable, + unsigned int pps_selector, + enum mipi_dsi_compression_algo algo); int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps);