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Fri, 19 Apr 2024 21:01:16 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 20 Apr 2024 07:01:00 +0300 Subject: [PATCH v2 3/9] drm/msm/dpu: in dpu_format replace bitmap with unsigned long field MIME-Version: 1.0 Message-Id: <20240420-dpu-format-v2-3-9e93226cbffd@linaro.org> References: <20240420-dpu-format-v2-0-9e93226cbffd@linaro.org> In-Reply-To: <20240420-dpu-format-v2-0-9e93226cbffd@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7917; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=bR+chZ8/vH2q7NiGJkzYGAuWCLJdrkjYEG1yJa8P7EI=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ5qyHYfpveLeJ96/s76KTSk2y215oPiYL+7+X6dzBuwV4 Xytysc7GY1ZGBi5GGTFFFl8ClqmxmxKDvuwY2o9zCBWJpApDFycAjCRZ1vZf7NleBRpsuzaMKNC Sdr9N/+Spzrlt0KYD6/aMSV5mvMn5yPSmdGqkpuVG07bn5LsMTDINOY4WfVn0/sSrV1Bu7Qkym8 aXVV+8N/W5r63S8zSZz/NLfRXGD/rnPaxRSC3r4GzP0z42s22m1+4+B+9Dvtplfyt4qT5Iy2tr5 ZzMoVk0yVnuGQ47A3e7td3pVF/66UizjPip68G6cxw/8uYuShO0Opj0YI1d4rl/+dkK+tYy286+ fN4bHXadF7txQ63HP+3Mv6d8I5tn1Kvw5qTmdrzKtf4XrWT1tvGXcl+hI/N5JzxMsH1l0957WLn O/q7ZlJaENdqnytrTDpeaAqmHrJytHoXXvtd96+J7Lf7AA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Using bitmap for the flags results in a clumsy syntax on test_bit, replace it with unsigned long type and simple binary ops. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 18 +++++++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 16 +++++++--------- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 87fa14fc5dd0..caf536788ece 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -45,7 +45,7 @@ bp, flg, fm, np) \ .unpack_count = uc, \ .bpp = bp, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -64,7 +64,7 @@ alpha, bp, flg, fm, np, th) \ .unpack_count = uc, \ .bpp = bp, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = th \ } @@ -84,7 +84,7 @@ alpha, chroma, count, bp, flg, fm, np) \ .unpack_count = count, \ .bpp = bp, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -102,7 +102,7 @@ alpha, chroma, count, bp, flg, fm, np) \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -121,7 +121,7 @@ flg, fm, np, th) \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = th \ } @@ -139,7 +139,7 @@ flg, fm, np, th) \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -158,7 +158,7 @@ flg, fm, np, th) \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = th \ } @@ -178,7 +178,7 @@ flg, fm, np) \ .unpack_count = 1, \ .bpp = bp, \ .fetch_mode = fm, \ - .flag = {(flg)}, \ + .flags = flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -1047,7 +1047,7 @@ const struct dpu_format *dpu_get_dpu_format_ext( DPU_ERROR("unsupported fmt: %4.4s modifier 0x%llX\n", (char *)&format, modifier); else - DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %d\n", + DRM_DEBUG_ATOMIC("fmt %4.4s mod 0x%llX ubwc %d yuv %ld\n", (char *)&format, modifier, DPU_FORMAT_IS_UBWC(fmt), DPU_FORMAT_IS_YUV(fmt)); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h index 31f97f535ce9..ed5206652413 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h @@ -40,23 +40,21 @@ enum dpu_format_flags { DPU_FORMAT_FLAG_YUV_BIT, DPU_FORMAT_FLAG_DX_BIT, DPU_FORMAT_FLAG_COMPRESSED_BIT, - DPU_FORMAT_FLAG_BIT_MAX, }; #define DPU_FORMAT_FLAG_YUV BIT(DPU_FORMAT_FLAG_YUV_BIT) #define DPU_FORMAT_FLAG_DX BIT(DPU_FORMAT_FLAG_DX_BIT) #define DPU_FORMAT_FLAG_COMPRESSED BIT(DPU_FORMAT_FLAG_COMPRESSED_BIT) -#define DPU_FORMAT_IS_YUV(X) \ - (test_bit(DPU_FORMAT_FLAG_YUV_BIT, (X)->flag)) -#define DPU_FORMAT_IS_DX(X) \ - (test_bit(DPU_FORMAT_FLAG_DX_BIT, (X)->flag)) + +#define DPU_FORMAT_IS_YUV(X) ((X)->flags & DPU_FORMAT_FLAG_YUV) +#define DPU_FORMAT_IS_DX(X) ((X)->flags & DPU_FORMAT_FLAG_DX) #define DPU_FORMAT_IS_LINEAR(X) ((X)->fetch_mode == MDP_FETCH_LINEAR) #define DPU_FORMAT_IS_TILE(X) \ (((X)->fetch_mode == MDP_FETCH_UBWC) && \ - !test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag)) + !((X)->flags & DPU_FORMAT_FLAG_COMPRESSED)) #define DPU_FORMAT_IS_UBWC(X) \ (((X)->fetch_mode == MDP_FETCH_UBWC) && \ - test_bit(DPU_FORMAT_FLAG_COMPRESSED_BIT, (X)->flag)) + ((X)->flags & DPU_FORMAT_FLAG_COMPRESSED)) #define DPU_BLEND_FG_ALPHA_FG_CONST (0 << 0) #define DPU_BLEND_FG_ALPHA_BG_CONST (1 << 0) @@ -334,7 +332,7 @@ enum dpu_3d_blend_mode { * @alpha_enable: whether the format has an alpha channel * @num_planes: number of planes (including meta data planes) * @fetch_mode: linear, tiled, or ubwc hw fetch behavior - * @flag: usage bit flags + * @flags: usage bit flags * @tile_width: format tile width * @tile_height: format tile height */ @@ -351,7 +349,7 @@ struct dpu_format { u8 alpha_enable; u8 num_planes; enum mdp_fetch_mode fetch_mode; - DECLARE_BITMAP(flag, DPU_FORMAT_FLAG_BIT_MAX); + unsigned long flags; u16 tile_width; u16 tile_height; };