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Fri, 19 Apr 2024 21:01:18 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 20 Apr 2024 07:01:04 +0300 Subject: [PATCH v2 7/9] drm/msm: convert msm_format::unpack_align_msb to the flag MIME-Version: 1.0 Message-Id: <20240420-dpu-format-v2-7-9e93226cbffd@linaro.org> References: <20240420-dpu-format-v2-0-9e93226cbffd@linaro.org> In-Reply-To: <20240420-dpu-format-v2-0-9e93226cbffd@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8913; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=xqaqEfOaXrzm0qh8jMjmh7qB545I7zB6szsBh+ORuJc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmIz4JhH4dVZgtWEhN5C0adIfxXHR8f3DQj3CIg U5XJ9WN+a2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZiM+CQAKCRCLPIo+Aiko 1Us+CACvz1UirPYuyhcyJFgzN0KnjuTJQ+G8OEfJLLeMkoGMfUKgpGdElvxy73tS1kEAq9ira8P k/SAWlvFlgiCs9scgjRSgaiAjl8llqZYmMaAS39PM1LW5PD9snvXAkFInPD3KO1p5COrKtJCHKZ jVuGuLOuN0jJAY48WLaBny1Hf4FDldwFm5qFTdcbcGUe3jtooXgxqBwlD9O91zUbKSXr5P1/BQs D6s+C5IeRmph2wIYyw90fQOTQTYi1jIQkzfqpv5UShby5j0/DtlCtozXdPY7N26QY/HsvSU8Vwq rKHfCfN6ChGH4B5Fc6QA9owWCnwKFf+cEPjh55IPH0DXrwxm X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Instead of having a u8 or bool field unpack_align_msb, convert it to the flag, this save space in the tables and allows us to handle all booleans in the same way. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 12 ++---------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 2 +- drivers/gpu/drm/msm/disp/mdp_format.h | 4 ++-- 4 files changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 705b91582b0f..2bb1584920c6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -43,7 +43,6 @@ bp, flg, fm, np) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = CHROMA_FULL, \ - .unpack_align_msb = 0, \ .unpack_count = uc, \ .bpp = bp, \ .fetch_mode = fm, \ @@ -64,7 +63,6 @@ alpha, bp, flg, fm, np, th) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = CHROMA_FULL, \ - .unpack_align_msb = 0, \ .unpack_count = uc, \ .bpp = bp, \ .fetch_mode = fm, \ @@ -86,7 +84,6 @@ alpha, chroma, count, bp, flg, fm, np) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 0, \ .unpack_count = count, \ .bpp = bp, \ .fetch_mode = fm, \ @@ -106,7 +103,6 @@ alpha, chroma, count, bp, flg, fm, np) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 0, \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ @@ -127,7 +123,6 @@ flg, fm, np, th) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 0, \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ @@ -147,11 +142,10 @@ flg, fm, np, th) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 1, \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flags = flg, \ + .flags = MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB | flg, \ .num_planes = np, \ .tile_height = DPU_TILE_HEIGHT_DEFAULT \ } @@ -168,11 +162,10 @@ flg, fm, np, th) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 1, \ .unpack_count = 2, \ .bpp = 2, \ .fetch_mode = fm, \ - .flags = flg, \ + .flags = MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB | flg, \ .num_planes = np, \ .tile_height = th \ } @@ -190,7 +183,6 @@ flg, fm, np) \ .bpc_r_cr = r, \ .bpc_a = a, \ .chroma_sample = chroma, \ - .unpack_align_msb = 0, \ .unpack_count = 1, \ .bpp = bp, \ .fetch_mode = fm, \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index d411d70b8cd8..f4b4cd084282 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -264,7 +264,7 @@ static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe, (fmt->element[1] << 8) | (fmt->element[0] << 0); src_format |= ((fmt->unpack_count - 1) << 12) | ((fmt->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT ? 1 : 0) << 17) | - (fmt->unpack_align_msb << 18) | + ((fmt->flags & MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB ? 1 : 0) << 18) | ((fmt->bpp - 1) << 9); if (fmt->fetch_mode != MDP_FETCH_LINEAR) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c index 19163634855f..93ff01c889b5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c @@ -97,7 +97,7 @@ static void dpu_hw_wb_setup_format(struct dpu_hw_wb *ctx, (fmt->element[1] << 8) | (fmt->element[0] << 0); - dst_format |= (fmt->unpack_align_msb << 18) | + dst_format |= ((fmt->flags & MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB ? 1 : 0) << 18) | ((fmt->flags & MSM_FORMAT_FLAG_UNPACK_TIGHT ? 1 : 0) << 17) | ((fmt->unpack_count - 1) << 12) | ((fmt->bpp - 1) << 9); diff --git a/drivers/gpu/drm/msm/disp/mdp_format.h b/drivers/gpu/drm/msm/disp/mdp_format.h index 18b2822dd552..d17f63c045a7 100644 --- a/drivers/gpu/drm/msm/disp/mdp_format.h +++ b/drivers/gpu/drm/msm/disp/mdp_format.h @@ -15,12 +15,14 @@ enum msm_format_flags { MSM_FORMAT_FLAG_DX_BIT, MSM_FORMAT_FLAG_COMPRESSED_BIT, MSM_FORMAT_FLAG_UNPACK_TIGHT_BIT, + MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB_BIT, }; #define MSM_FORMAT_FLAG_YUV BIT(MSM_FORMAT_FLAG_YUV_BIT) #define MSM_FORMAT_FLAG_DX BIT(MSM_FORMAT_FLAG_DX_BIT) #define MSM_FORMAT_FLAG_COMPRESSED BIT(MSM_FORMAT_FLAG_COMPRESSED_BIT) #define MSM_FORMAT_FLAG_UNPACK_TIGHT BIT(MSM_FORMAT_FLAG_UNPACK_TIGHT_BIT) +#define MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB BIT(MSM_FORMAT_FLAG_UNPACK_ALIGN_MSB_BIT) /** * struct msm_format: defines the format configuration @@ -29,7 +31,6 @@ enum msm_format_flags { * @fetch_type: how the color components are packed in pixel format * @chroma_sample: chroma sub-samplng type * @alpha_enable: whether the format has an alpha channel - * @unpack_align_msb: unpack aligned to LSB or MSB * @unpack_count: number of the components to unpack * @bpp: bytes per pixel * @flags: usage bit flags @@ -45,7 +46,6 @@ struct msm_format { enum mdp_fetch_type fetch_type; enum mdp_chroma_samp_type chroma_sample; bool alpha_enable; - u8 unpack_align_msb; u8 unpack_count; u8 bpp; unsigned long flags;