From patchwork Thu May 2 10:38:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2hhd24gU3VuZyAo5a6L5a2d6KyZKQ==?= X-Patchwork-Id: 13651566 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BCD7AC25B76 for ; Thu, 2 May 2024 10:39:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D5AC10EA34; Thu, 2 May 2024 10:39:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="Xq14sqMZ"; dkim-atps=neutral Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDD3310EA34 for ; Thu, 2 May 2024 10:39:01 +0000 (UTC) X-UUID: 2ef231ee087011ef8065b7b53f7091ad-20240502 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WYNlPuYbcVBq3L7dw0isrnQUyZvAijEpUh2IAETN/9Q=; b=Xq14sqMZ9OuDB9DZwOVRpHy4VGS/CPQMyIXh3KLn2sA+0Y33PeGRHebRxA/OtMpM+v99+B7VFH7ccmKUO5f2QLiGovuP45NruNeUiDHQScXdIoNIHTtsBsmnaRPWMoB6Si6emYziTO+avG0PKFni2BvBja+KU/VkWl2fsAaio+M=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38, REQID:7286e558-578c-49bc-abc3-314b7d937ccd, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:82c5f88, CLOUDID:c2ee9afb-ed05-4274-9204-014369d201e8, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 2ef231ee087011ef8065b7b53f7091ad-20240502 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 420312962; Thu, 02 May 2024 18:38:58 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 2 May 2024 18:38:57 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 2 May 2024 18:38:57 +0800 From: Shawn Sung To: Chun-Kuang Hu , AngeloGioacchino Del Regno CC: Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , Bibby Hsieh , CK Hu , "Nancy . Lin" , Fei Shao , Sean Paul , Jason Chen , , , , , Hsiao Chien Sung Subject: [PATCH v7 13/18] drm/mediatek: Support "None" blending in OVL Date: Thu, 2 May 2024 18:38:43 +0800 Message-ID: <20240502103848.5845-14-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240502103848.5845-1-shawn.sung@mediatek.com> References: <20240502103848.5845-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "None" alpha blending mode on MediaTek's chips. Signed-off-by: Hsiao Chien Sung Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index ad84c2fe57111..87dbecc09a260 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -480,7 +480,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, con |= state->base.alpha & OVL_CON_ALPHA; } - if (state->base.fb && !state->base.fb->format->has_alpha) + if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || + (state->base.fb && !state->base.fb->format->has_alpha)) ignore_pixel_alpha = OVL_CONST_BLEND; if (pending->rotation & DRM_MODE_REFLECT_Y) {