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Sun, 02 Jun 2024 14:39:57 -0700 (PDT) From: Dmitry Baryshkov Date: Mon, 03 Jun 2024 00:39:55 +0300 Subject: [PATCH v2 9/9] drm/msm/dpu: sync mode_config limits to the FB limits in dpu_plane.c MIME-Version: 1.0 Message-Id: <20240603-dpu-mode-config-width-v2-9-16af520575a6@linaro.org> References: <20240603-dpu-mode-config-width-v2-0-16af520575a6@linaro.org> In-Reply-To: <20240603-dpu-mode-config-width-v2-0-16af520575a6@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: Abel Vesa , Johan Hovold , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2423; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=jidBMydco/5DfITBWsZBXtE9R50V90I/Z1ZObhQMr4Y=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmXOam196bo+wcCbur0w0TxnWzapo7bLGi8eHyh 1s1b/+FagWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlzmpgAKCRCLPIo+Aiko 1QGsB/4jqxWpfJt2CtymybHgjeXtamR2wwkPVI7lUOVx/6tFVCh/kFSjNQIvSNTrSAjGc9raLAY UzV2uXTJfHj47KMauiF0MIRILFtI+NYgJI20prq1qL8LRbIg8objny7nkKq4yaOGSkg4uBJWhyA dh8N6h6TgMhkjfn6RDK35RDnSB11cx8scH66TxthrzPUZp+UDcXGV6pffQ2L3Sc9+iVH1k90Yip sdavL0VRZ0jggtaQLBIJ9D4b9qUQkAwMAjKxYVlXFLjYQI6XKd7DEeQ0nr21OmHY91VdzCeCfBM LBuZ5quRWDiK7bjYJR/KO0Rt5YKuICjTSHHzbBU1drr9ANYC X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Lift mode_config limits set by the DPU driver to the actual FB limits as handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs, to the drm_crtc_helper_funcs::mode_valid() callback. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 15 +++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 9 ++------- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index c5e874a3656a..8cf063e4c09d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1236,6 +1236,20 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, return 0; } +enum drm_mode_status dpu_crtc_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); + + /* + * max crtc width is equal to the max mixer width * 2 and max height is + * is 4K + */ + return drm_mode_validate_size(mode, + 2 * dpu_kms->catalog->caps->max_mixer_width, + 4096); +} + int dpu_crtc_vblank(struct drm_crtc *crtc, bool en) { struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc); @@ -1451,6 +1465,7 @@ static const struct drm_crtc_helper_funcs dpu_crtc_helper_funcs = { .atomic_check = dpu_crtc_atomic_check, .atomic_begin = dpu_crtc_atomic_begin, .atomic_flush = dpu_crtc_atomic_flush, + .mode_valid = dpu_crtc_mode_valid, .get_scanout_position = dpu_crtc_get_scanout_position, }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 0d1dcc94455c..d1b937e127b0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1147,13 +1147,8 @@ static int dpu_kms_hw_init(struct msm_kms *kms) dev->mode_config.min_width = 0; dev->mode_config.min_height = 0; - /* - * max crtc width is equal to the max mixer width * 2 and max height is - * is 4K - */ - dev->mode_config.max_width = - dpu_kms->catalog->caps->max_mixer_width * 2; - dev->mode_config.max_height = 4096; + dev->mode_config.max_width = DPU_MAX_IMG_WIDTH; + dev->mode_config.max_height = DPU_MAX_IMG_HEIGHT; dev->max_vblank_count = 0xffffffff; /* Disable vblank irqs aggressively for power-saving */