| Message ID | 20240603054904.222589-7-mitulkumar.ajitkumar.golani@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Implement CMRR Support | expand |
On 6/3/2024 11:19 AM, Mitul Golani wrote: > Compute params for Adaptive Sync SDP when Fixed Average Vtotal > mode is enabled. > > --v2: > Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). > > --v3: > - Since vrr.enable is set in case of cmrr also, handle > accordingly(Ankit). > - check cmrr.enable when CMRR flags are set during intel_dp_compute_as_sdp. > > Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index ac81b172b1ec..be3b9ba943a5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2637,11 +2637,20 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, > /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ > as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; > as_sdp->length = 0x9; > - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; > - as_sdp->vtotal = adjusted_mode->vtotal; > - as_sdp->target_rr = 0; > as_sdp->duration_incr_ms = 0; > as_sdp->duration_incr_ms = 0; > + > + if (crtc_state->cmrr.enable) { > + as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; > + as_sdp->vtotal = adjusted_mode->vtotal; > + as_sdp->target_rr = DIV_ROUND_UP(adjusted_mode->clock * 1000, > + adjusted_mode->htotal * adjusted_mode->vtotal); Perhpas drm_mode_vrefresh() here. With that change, this is: Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > + as_sdp->target_rr_divider = true; > + } else { > + as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; > + as_sdp->vtotal = adjusted_mode->vtotal; > + as_sdp->target_rr = 0; > + } > } > > static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ac81b172b1ec..be3b9ba943a5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2637,11 +2637,20 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; as_sdp->length = 0x9; - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; - as_sdp->vtotal = adjusted_mode->vtotal; - as_sdp->target_rr = 0; as_sdp->duration_incr_ms = 0; as_sdp->duration_incr_ms = 0; + + if (crtc_state->cmrr.enable) { + as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; + as_sdp->vtotal = adjusted_mode->vtotal; + as_sdp->target_rr = DIV_ROUND_UP(adjusted_mode->clock * 1000, + adjusted_mode->htotal * adjusted_mode->vtotal); + as_sdp->target_rr_divider = true; + } else { + as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; + as_sdp->vtotal = adjusted_mode->vtotal; + as_sdp->target_rr = 0; + } } static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
Compute params for Adaptive Sync SDP when Fixed Average Vtotal mode is enabled. --v2: Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). --v3: - Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). - check cmrr.enable when CMRR flags are set during intel_dp_compute_as_sdp. Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)