Message ID | 20240604024405.1122488-1-kuro.chung@ite.com.tw (mailing list archive) |
---|---|
State | Accepted |
Headers | show |
Series | [v1] drm/bridge: it6505: update usleep_range for RC circuit charge time | expand |
On Tue, 4 Jun 2024 10:44:05 +0800, kuro wrote: > From: Kuro Chung <kuro.chung@ite.com.tw> > > The spec of timing between IVDD/OVDD and SYSRTEN is 10ms, but SYSRSTN RC > circuit need at least 25ms for rising time, update for match spec > > Applied, thanks! [1/1] drm/bridge: it6505: update usleep_range for RC circuit charge time https://cgit.freedesktop.org/drm/drm-misc/commit/?id=8814444e62b8 Rob
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index cd1b5057ddfb4..1e1c06fdf2064 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -2615,7 +2615,7 @@ static int it6505_poweron(struct it6505 *it6505) gpiod_set_value_cansleep(pdata->gpiod_reset, 0); usleep_range(1000, 2000); gpiod_set_value_cansleep(pdata->gpiod_reset, 1); - usleep_range(10000, 20000); + usleep_range(25000, 35000); } it6505->powered = true;