@@ -78,3 +78,4 @@ nvkm_driver_ctor(struct nvkm_device *device, const struct nvif_driver **pdrv,
*pdrv = &nvkm_driver;
return 0;
}
+EXPORT_SYMBOL(nvkm_driver_ctor);
@@ -224,6 +224,7 @@ nvkm_gpuobj_del(struct nvkm_gpuobj **pgpuobj)
*pgpuobj = NULL;
}
}
+EXPORT_SYMBOL(nvkm_gpuobj_del);
int
nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero,
@@ -240,6 +241,7 @@ nvkm_gpuobj_new(struct nvkm_device *device, u32 size, int align, bool zero,
nvkm_gpuobj_del(pgpuobj);
return ret;
}
+EXPORT_SYMBOL(nvkm_gpuobj_new);
/* the below is basically only here to support sharing the paged dma object
* for PCI(E)GART on <=nv4x chipsets, and should *not* be expected to work
@@ -81,6 +81,7 @@ nvkm_mm_free(struct nvkm_mm *mm, struct nvkm_mm_node **pthis)
*pthis = NULL;
}
+EXPORT_SYMBOL(nvkm_mm_free);
static struct nvkm_mm_node *
region_head(struct nvkm_mm *mm, struct nvkm_mm_node *a, u32 size)
@@ -156,6 +157,7 @@ nvkm_mm_head(struct nvkm_mm *mm, u8 heap, u8 type, u32 size_max, u32 size_min,
return -ENOSPC;
}
+EXPORT_SYMBOL(nvkm_mm_head);
static struct nvkm_mm_node *
region_tail(struct nvkm_mm *mm, struct nvkm_mm_node *a, u32 size)
@@ -278,6 +280,7 @@ nvkm_mm_init(struct nvkm_mm *mm, u8 heap, u32 offset, u32 length, u32 block)
mm->heap_nodes++;
return 0;
}
+EXPORT_SYMBOL(nvkm_mm_init);
int
nvkm_mm_fini(struct nvkm_mm *mm)
@@ -305,3 +308,4 @@ nvkm_mm_fini(struct nvkm_mm *mm)
mm->heap_nodes = 0;
return 0;
}
+EXPORT_SYMBOL(nvkm_mm_fini);
@@ -109,6 +109,7 @@ void nvkm_acpi_switcheroo_set_powerdown(void)
NOUVEAU_DSM_OPTIMUS_SET_POWERDOWN, &result);
}
+EXPORT_SYMBOL(nvkm_acpi_switcheroo_set_powerdown);
/*
* On some platforms, _DSM(nvkm_op_dsm_muid, func0) has special
@@ -76,6 +76,7 @@ nvkm_gr_units(struct nvkm_gr *gr)
return gr->func->units(gr);
return 0;
}
+EXPORT_SYMBOL(nvkm_gr_units);
int
nvkm_gr_tlb_flush(struct nvkm_gr *gr)
@@ -2317,6 +2317,7 @@ nvbios_exec(struct nvbios_init *init)
init->nested--;
return 0;
}
+EXPORT_SYMBOL(nvbios_exec);
int
nvbios_post(struct nvkm_subdev *subdev, bool execute)
@@ -438,3 +438,4 @@ nvbios_pll_parse(struct nvkm_bios *bios, u32 type, struct nvbios_pll *info)
return 0;
}
+EXPORT_SYMBOL(nvbios_pll_parse);
@@ -36,6 +36,7 @@ nvkm_fb_tile_fini(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile)
{
fb->func->tile.fini(fb, region, tile);
}
+EXPORT_SYMBOL(nvkm_fb_tile_fini);
void
nvkm_fb_tile_init(struct nvkm_fb *fb, int region, u32 addr, u32 size,
@@ -43,6 +44,7 @@ nvkm_fb_tile_init(struct nvkm_fb *fb, int region, u32 addr, u32 size,
{
fb->func->tile.init(fb, region, addr, size, pitch, flags, tile);
}
+EXPORT_SYMBOL(nvkm_fb_tile_init);
void
nvkm_fb_tile_prog(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile)
@@ -56,6 +58,7 @@ nvkm_fb_tile_prog(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile)
nvkm_engine_tile(device->mpeg, region);
}
}
+EXPORT_SYMBOL(nvkm_fb_tile_prog);
static void
nvkm_fb_sysmem_flush_page_init(struct nvkm_device *device)
@@ -75,6 +75,7 @@ nvkm_gpio_find(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line,
return -ENOENT;
}
+EXPORT_SYMBOL(nvkm_gpio_find);
int
nvkm_gpio_set(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, int state)
@@ -91,6 +92,7 @@ nvkm_gpio_set(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, int state)
return ret;
}
+EXPORT_SYMBOL(nvkm_gpio_set);
int
nvkm_gpio_get(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line)
@@ -107,6 +109,7 @@ nvkm_gpio_get(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line)
return ret;
}
+EXPORT_SYMBOL(nvkm_gpio_get);
static void
nvkm_gpio_intr_fini(struct nvkm_event *event, int type, int index)
@@ -71,6 +71,7 @@ nvkm_i2c_bus_find(struct nvkm_i2c *i2c, int id)
return NULL;
}
+EXPORT_SYMBOL(nvkm_i2c_bus_find);
struct nvkm_i2c_aux *
nvkm_i2c_aux_find(struct nvkm_i2c *i2c, int id)
@@ -84,6 +85,7 @@ nvkm_i2c_aux_find(struct nvkm_i2c *i2c, int id)
return NULL;
}
+EXPORT_SYMBOL(nvkm_i2c_aux_find);
static void
nvkm_i2c_intr_fini(struct nvkm_event *event, int type, int id)
@@ -189,6 +189,7 @@ nvkm_i2c_bus_probe(struct nvkm_i2c_bus *bus, const char *what,
BUS_DBG(bus, "no devices found.");
return -ENODEV;
}
+EXPORT_SYMBOL(nvkm_i2c_bus_probe);
void
nvkm_i2c_bus_del(struct nvkm_i2c_bus **pbus)
@@ -126,6 +126,7 @@ nvkm_iccsense_read_all(struct nvkm_iccsense *iccsense)
}
return result;
}
+EXPORT_SYMBOL(nvkm_iccsense_read_all);
static void *
nvkm_iccsense_dtor(struct nvkm_subdev *subdev)
@@ -33,6 +33,7 @@ nvkm_therm_temp_get(struct nvkm_therm *therm)
return therm->func->temp_get(therm);
return -ENODEV;
}
+EXPORT_SYMBOL(nvkm_therm_temp_get);
static int
nvkm_therm_update_trip(struct nvkm_therm *therm)
@@ -164,6 +164,7 @@ nvkm_therm_fan_sense(struct nvkm_therm *therm)
} else
return 0;
}
+EXPORT_SYMBOL(nvkm_therm_fan_sense);
int
nvkm_therm_fan_user_get(struct nvkm_therm *therm)
@@ -46,6 +46,7 @@ nvkm_volt_get(struct nvkm_volt *volt)
}
return ret;
}
+EXPORT_SYMBOL(nvkm_volt_get);
static int
nvkm_volt_set(struct nvkm_volt *volt, u32 uv)
The primary interfaces to NVKM are through NVIF, but there are a small number of functions which are called directly. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/core/driver.c | 1 + drivers/gpu/drm/nouveau/nvkm/core/gpuobj.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/core/mm.c | 4 ++++ drivers/gpu/drm/nouveau/nvkm/device/acpi.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c | 3 +++ drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c | 3 +++ drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.c | 1 + 15 files changed, 24 insertions(+)