| Message ID | 20240815-preemption-a750-t-v1-3-7bda26c34037@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Preemption support for A7XX | expand |
On Thu, Aug 15, 2024 at 08:26:13PM +0200, Antonino Maniscalco wrote: > Adds a field to `adreno_info` to store the GPU specific preempt record > size. > > Signed-off-by: Antonino Maniscalco <antomani103@gmail.com> > --- > drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 3 +++ > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > index 68ba9aed5506..4cee54d57646 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > @@ -1190,6 +1190,7 @@ static const struct adreno_info a7xx_gpus[] = { > .protect = &a730_protect, > }, > .address_space_size = SZ_16G, > + .preempt_record_size = 2860 * SZ_1K, > }, { > .chip_ids = ADRENO_CHIP_IDS(0x43050a01), /* "C510v2" */ > .family = ADRENO_7XX_GEN2, > @@ -1209,6 +1210,7 @@ static const struct adreno_info a7xx_gpus[] = { > .gmu_chipid = 0x7020100, > }, > .address_space_size = SZ_16G, > + .preempt_record_size = 4192 * SZ_1K, > }, { > .chip_ids = ADRENO_CHIP_IDS(0x43050c01), /* "C512v2" */ We can use 4192KB for X185. With that, Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> -Akhil. > .family = ADRENO_7XX_GEN2, > @@ -1245,6 +1247,7 @@ static const struct adreno_info a7xx_gpus[] = { > .gmu_chipid = 0x7090100, > }, > .address_space_size = SZ_16G, > + .preempt_record_size = 3572 * SZ_1K, > } > }; > DECLARE_ADRENO_GPULIST(a7xx); > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > index 1ab523a163a0..6b1888280a83 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h > @@ -111,6 +111,7 @@ struct adreno_info { > * {SHRT_MAX, 0} sentinal. > */ > struct adreno_speedbin *speedbins; > + u64 preempt_record_size; > }; > > #define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 } > > -- > 2.46.0 > >
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c index 68ba9aed5506..4cee54d57646 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -1190,6 +1190,7 @@ static const struct adreno_info a7xx_gpus[] = { .protect = &a730_protect, }, .address_space_size = SZ_16G, + .preempt_record_size = 2860 * SZ_1K, }, { .chip_ids = ADRENO_CHIP_IDS(0x43050a01), /* "C510v2" */ .family = ADRENO_7XX_GEN2, @@ -1209,6 +1210,7 @@ static const struct adreno_info a7xx_gpus[] = { .gmu_chipid = 0x7020100, }, .address_space_size = SZ_16G, + .preempt_record_size = 4192 * SZ_1K, }, { .chip_ids = ADRENO_CHIP_IDS(0x43050c01), /* "C512v2" */ .family = ADRENO_7XX_GEN2, @@ -1245,6 +1247,7 @@ static const struct adreno_info a7xx_gpus[] = { .gmu_chipid = 0x7090100, }, .address_space_size = SZ_16G, + .preempt_record_size = 3572 * SZ_1K, } }; DECLARE_ADRENO_GPULIST(a7xx); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 1ab523a163a0..6b1888280a83 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -111,6 +111,7 @@ struct adreno_info { * {SHRT_MAX, 0} sentinal. */ struct adreno_speedbin *speedbins; + u64 preempt_record_size; }; #define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }
Adds a field to `adreno_info` to store the GPU specific preempt record size. Signed-off-by: Antonino Maniscalco <antomani103@gmail.com> --- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 3 +++ drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + 2 files changed, 4 insertions(+)