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Thu, 03 Oct 2024 01:14:36 -0700 (PDT) From: Krzysztof Kozlowski Date: Thu, 03 Oct 2024 10:14:21 +0200 Subject: [PATCH 4/5] dt-bindings: display/msm: merge SM8450 DPU into SC7280 MIME-Version: 1.0 Message-Id: <20241003-dt-binding-display-msm-merge-v1-4-91ab08fc76a2@linaro.org> References: <20241003-dt-binding-display-msm-merge-v1-0-91ab08fc76a2@linaro.org> In-Reply-To: <20241003-dt-binding-display-msm-merge-v1-0-91ab08fc76a2@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Neil Armstrong , Krishna Manikandan Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5495; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=AKhgP7q0GaIQSUQKoHkiCv6d3dwP2bPLVjVUtecZON0=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBm/lJi9PKnUZKPp3bxs4fScDOr+KitJedC3+vAz 0o9qOFFaG2JAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZv5SYgAKCRDBN2bmhouD 11upEACJ0BVnq8qjv3Ph2jKpGDLXGePbTEmqdtBS4tTB4aqUTYWkLBhapJkGGUSa04rNy3eDHdx 2Chu4qCpVLpNcHjHfnPQxkeUZYK0fH1ZJvMfTzbNQsq5OeIkWn8ARRPBO3wISAyh/U276apikcf 6Pd8hSW0YCJNbyygS807LXfA0RD25MVv8/azvytxtmnLKqvaJpWPdXSI8Fn/7osOh9PcvKs5r19 rhbTxv6AoRIgeoXHUtKh1/r/tco3c31H9fXHTQsz0J73B6DyoQFjzs7OXXmjDMvwxA/CmDFRlra pWEVEAQOC5W2vMFWRp+98Mnj+LlRaeqs+0dCZESTeZg4rlSsknaFiqb9qtqA5yUU+pDBSdIkvL/ yha2Clkxx243AZ+6wHZd7gVEEBXzFtpkPgOvami5bVTkIW0IDDgE7o1+VRi0z5SrvFiM5JwKUMV 2cD7ZFojH7Ivko0G5OQvE5bIftcK1Jhx9lvvSGHRE6dwe3l8YN3lyE9s+O8uY0fxjpdCEXoflpX XCHXoAg0Fz0AN1onmNQIruiCEav5AmsJm0L5nlBu7tOnNr93ugJlG4LRtHKtyPdHUcqexzaEuN7 QVkk0g8ddnRWELvo/slmntpKjvyn5X/SxkkMvYAZWo3JjpbrxEf14mX+MJd9J5U6YjX+4yDUX9f akLeIow5PLj1HHQ== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Split of the bindings was artificial and not helping - we end up with multiple binding files for very similar devices thus increasing the chances of using different order of reg and clocks entries. Unify DPU bindings of SC7280 and SM8450, because they are the same. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) --- .../bindings/display/msm/qcom,sc7280-dpu.yaml | 2 + .../bindings/display/msm/qcom,sm8450-dpu.yaml | 139 --------------------- 2 files changed, 2 insertions(+), 139 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml index 3d69a573b450..750230839fc9 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml @@ -8,6 +8,7 @@ title: Qualcomm Display DPU on SC7280 maintainers: - Bjorn Andersson + - Dmitry Baryshkov - Krishna Manikandan $ref: /schemas/display/msm/dpu-common.yaml# @@ -18,6 +19,7 @@ properties: - qcom,sc7280-dpu - qcom,sc8280xp-dpu - qcom,sm8350-dpu + - qcom,sm8450-dpu reg: items: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml deleted file mode 100644 index 2a5d3daed0e1..000000000000 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml +++ /dev/null @@ -1,139 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-dpu.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SM8450 Display DPU - -maintainers: - - Dmitry Baryshkov - -$ref: /schemas/display/msm/dpu-common.yaml# - -properties: - compatible: - const: qcom,sm8450-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for vbif register set - - reg-names: - items: - - const: mdp - - const: vbif - - clocks: - items: - - description: Display hf axi - - description: Display sf axi - - description: Display ahb - - description: Display lut - - description: Display core - - description: Display vsync - - clock-names: - items: - - const: bus - - const: nrt_bus - - const: iface - - const: lut - - const: core - - const: vsync - -required: - - compatible - - reg - - reg-names - - clocks - - clock-names - -unevaluatedProperties: false - -examples: - - | - #include - #include - #include - #include - #include - - display-controller@ae01000 { - compatible = "qcom,sm8450-dpu"; - reg = <0x0ae01000 0x8f000>, - <0x0aeb0000 0x2008>; - reg-names = "mdp", "vbif"; - - clocks = <&gcc GCC_DISP_HF_AXI_CLK>, - <&gcc GCC_DISP_SF_AXI_CLK>, - <&dispcc DISP_CC_MDSS_AHB_CLK>, - <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, - <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "bus", - "nrt_bus", - "iface", - "lut", - "core", - "vsync"; - - assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - assigned-clock-rates = <19200000>; - - operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd RPMHPD_MMCX>; - - interrupt-parent = <&mdss>; - interrupts = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dpu_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - - port@1 { - reg = <1>; - dpu_intf2_out: endpoint { - remote-endpoint = <&dsi1_in>; - }; - }; - }; - - mdp_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-172000000{ - opp-hz = /bits/ 64 <172000000>; - required-opps = <&rpmhpd_opp_low_svs_d1>; - }; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-325000000 { - opp-hz = /bits/ 64 <325000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-375000000 { - opp-hz = /bits/ 64 <375000000>; - required-opps = <&rpmhpd_opp_svs_l1>; - }; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - }; -...