| Message ID | 20241029162645.9060-1-zichenxie0106@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/dpu: Cast an operand to u64 to prevent potential overflow in _dpu_core_perf_calc_clk() | expand |
On 10/29/2024 9:26 AM, Gax-c wrote: > From: Zichen Xie <zichenxie0106@gmail.com> > > There may be a potential integer overflow issue in > _dpu_core_perf_calc_clk(). crtc_clk is defined as u64, while > mode->vtotal, mode->hdisplay, and drm_mode_vrefresh(mode) are defined as > a smaller data type. The result of the calculation will be limited to > "int" in this case without correct casting. In screen with high > resolution and high refresh rate, integer overflow may happen. > So, we recommend adding an extra cast to prevent potential > integer overflow. > You could just say "cast crtc_clk calculation to u64 in _dpu_core_perf_calc_clk()" in the subject to be more specific about which operand you are referring to. > Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for display") > Signed-off-by: Zichen Xie <zichenxie0106@gmail.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > index 68fae048a9a8..260accc151d4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > @@ -80,7 +80,7 @@ static u64 _dpu_core_perf_calc_clk(const struct dpu_perf_cfg *perf_cfg, > > mode = &state->adjusted_mode; > > - crtc_clk = mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); > + crtc_clk = (u64)mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); > > drm_atomic_crtc_for_each_plane(plane, crtc) { > pstate = to_dpu_plane_state(plane->state); Change looks valid to me, so with the subject fixed a bit: Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 68fae048a9a8..260accc151d4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -80,7 +80,7 @@ static u64 _dpu_core_perf_calc_clk(const struct dpu_perf_cfg *perf_cfg, mode = &state->adjusted_mode; - crtc_clk = mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); + crtc_clk = (u64)mode->vtotal * mode->hdisplay * drm_mode_vrefresh(mode); drm_atomic_crtc_for_each_plane(plane, crtc) { pstate = to_dpu_plane_state(plane->state);