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[1/2] drm/amd/display: Fix incorrect power gating configuration for DOMAIN10

Message ID 20241105140256.2465614-2-quzicheng@huawei.com (mailing list archive)
State New, archived
Headers show
Series drm/amd/display: Fix Power Gating Configuration | expand

Commit Message

Zicheng Qu Nov. 5, 2024, 2:02 p.m. UTC
The current implementation incorrectly updates DOMAIN10_PG_CONFIG with
DOMAIN8_POWER_FORCEON, which is not the intended behavior. This patch
corrects the power gating configuration by updating DOMAIN10_PG_CONFIG
with DOMAIN10_POWER_FORCEON, preventing potential issues related to
power management.

Fixes: 46825fcfbe16 ("drm/amd/display: avoid power gate domains that doesn't exist")
Signed-off-by: Zicheng Qu <quzicheng@huawei.com>
---
 drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Alex Deucher Nov. 6, 2024, 3:27 p.m. UTC | #1
On Wed, Nov 6, 2024 at 3:18 AM Zicheng Qu <quzicheng@huawei.com> wrote:
>
> The current implementation incorrectly updates DOMAIN10_PG_CONFIG with
> DOMAIN8_POWER_FORCEON, which is not the intended behavior. This patch
> corrects the power gating configuration by updating DOMAIN10_PG_CONFIG
> with DOMAIN10_POWER_FORCEON, preventing potential issues related to
> power management.

The bitfield is the same for both so there is no functional change.
This is just a cosmetic change to use the right bitfield macro.

Alex

>
> Fixes: 46825fcfbe16 ("drm/amd/display: avoid power gate domains that doesn't exist")
> Signed-off-by: Zicheng Qu <quzicheng@huawei.com>
> ---
>  drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
> index a80c08582932..67a77274d813 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
> @@ -317,7 +317,7 @@ void dcn20_enable_power_gating_plane(
>         if (REG(DOMAIN8_PG_CONFIG))
>                 REG_UPDATE(DOMAIN8_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
>         if (REG(DOMAIN10_PG_CONFIG))
> -               REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
> +               REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN10_POWER_FORCEON, force_on);
>
>         /* DPP0/1/2/3/4/5 */
>         REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on);
> --
> 2.34.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index a80c08582932..67a77274d813 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -317,7 +317,7 @@  void dcn20_enable_power_gating_plane(
 	if (REG(DOMAIN8_PG_CONFIG))
 		REG_UPDATE(DOMAIN8_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
 	if (REG(DOMAIN10_PG_CONFIG))
-		REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN8_POWER_FORCEON, force_on);
+		REG_UPDATE(DOMAIN10_PG_CONFIG, DOMAIN10_POWER_FORCEON, force_on);
 
 	/* DPP0/1/2/3/4/5 */
 	REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, force_on);