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Tue, 12 Nov 2024 10:05:54 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%5]) with mapi id 15.20.8137.027; Tue, 12 Nov 2024 10:05:54 +0000 From: Liu Ying To: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, quic_bjorande@quicinc.com, geert+renesas@glider.be, dmitry.baryshkov@linaro.org, arnd@arndb.de, nfraprado@collabora.com, marex@denx.de Subject: [PATCH v6 1/7] arm64: dts: imx8mp-skov-revb-mi1010ait-1cp1: Set "media_disp2_pix" clock rate to 70MHz Date: Tue, 12 Nov 2024 18:05:41 +0800 Message-Id: <20241112100547.2908497-2-victor.liu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241112100547.2908497-1-victor.liu@nxp.com> References: <20241112100547.2908497-1-victor.liu@nxp.com> X-ClientProxiedBy: SG2PR02CA0025.apcprd02.prod.outlook.com (2603:1096:3:18::13) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|PAXPR04MB8256:EE_ X-MS-Office365-Filtering-Correlation-Id: f477ad38-a8ef-4793-3225-08dd03019807 X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM7PR04MB7046.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(376014)(7416014)(52116014)(1800799024)(38350700014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9sBdl5aKLfYUEgMEqgFdrWLhrI7OtgDRzztii0QR4O87MozXaRskmJUJDpriZhdymJYRlIon0QP059fWAoegjroW7JFGnK1q36kV/wyiC1akSgu5K1GNBXxWmt8VI19WKNecyUlvxnYLfaZhxQyvtmgzeERjK8i2vMkn5/C+1aTj7bDISlEGrHQPw//ysag7RdtsZ/NsHZfmkPbVbyVJhhhahMbDYo5GXNPk869iLGLyo9P9+1qwlgpF9oOLUdhMPTo3FYQpPdSCmfbj7NS8oL0SEDtCes0nOpHXFek2gP7rOQkblLVb49cKUvmx7copir4yqE+bcCLSpVECB7PppD/T/gzOns8RSnchHS3UtBGoL6P26/rpp6P/M4EJoqaXXv4QdAisBGq0Xsm2a1tAuY2SesOe0Y2bllsqDdBk04VTtZmQDmC/OdpiTLpwRcSKLlUVPfQq1mHm+1IvrMaOKcD98oftkPr5kYOuCKohKuKNu9LeY1rMBM8eGnOJMIVUgxBA9wvQGo6w48s8dqxtmqz5HN2E5Qt+Vfpqiw1n6s9V19AN3WIo5VIR/E3Cy2pQqFMCsKABHq2ZmZ4zHj4pUANBHQqysbkwLsArDYANiQDxUO0PWOHBdjt7wxOPN3OBmDvOVV9GjMxqS9+Kol/J04mF4cPf1DZSVXIzJ9J4X4WkCFzOUWOk0vHB6c49nNj6J/6eefgmucIscr4pDCTnWMIIpaUbzVIv8F5XnCgpPhrRRVEo30VtoVgQDIQ1T45MNqIhyhHaFKIrueDwji0clO4oE8FGvPDSZUojLllu3ICNgx61MuYTkoWrDguCn+fky3y7gsY/12PCzp64sDqlQmjV7LvSxqV6S5MAfWSoCvwYptItLT4LEI+6D05Ob2VG19BRTELGkjAOqTBJtn4tKZGdA8YuMR7h4GWEbdmEZ28YK8ZvXhz3Hytjx3DePX9AkmNjbCCXkYLgOwj8/2MQnkE49ALuXfENTCe3alqzSfOeR/gBy/9kr4Dwv5rPaM46/wuvjoZxnCLcpdwx+pXuSCCZsXuiXRfWUw6dQ5AXuRL3eVNbN1wH/LhK9xDYjgTqTWkCQd60pDJKYUbjAmqSxeYYXe1oGfVEj/JN1BZrIGxz8rcpcMSPD95V7+zZXcuDpynCb1j4PN+aBNPyJymfJFs3+AqCMzJTDM0UPJeASRwNukpyFisL2fzd+8DDTG073U69jyFpelAUYpZ2XcUb8iuH0iicQxb7jry2ODNkRXrj0OWb2h3tAQkLbXM+S2fl7b38KJOiXghGpuHTU6QRRc1AD/AA2QhsduFvSk+Cf9CHe5Pvx/jNbdxNcVoVPVaYH69RpnipWCAG8Qr51uv1Uds9XihcgqTy1ONKCVLyc9ef2NwrBnixcpfi5Pb0FU+4b+/vLRyrwbze+/OSbT0GsWDWdIH5o4wPVfHUecqZ/5DGCfBSb8boQl3P8fLiSV5UD7WnlHyy7bYVw3Woa7dHU43q3gK9G9SQItFLNF9bqFnwdH4gOBbdbpLlkTezaaNHjDbIcdGbfHISAqxjU3na4OgCpSW1+ma+VPxFBzjYF3lbJdP6aq5EWR9pjHtvLMSy X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f477ad38-a8ef-4793-3225-08dd03019807 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2024 10:05:53.9985 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rlZGL78HDRb7ON8TOJhrCsBq3hfUOLNqNgijZus3TniQj+O+IJCJxdlNTb686nj9MZ0Ya+z9wCNPVfiR5WwHVA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8256 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The LVDS panel "multi-inno,mi1010ait-1cp" used on this platform has a typical pixel clock rate of 70MHz. Set "media_disp2_pix" clock rate to that rate, instead of the original 68.9MHz. The LVDS serial clock is controlled by "media_ldb" clock. It should run at 490MHz(7-fold the pixel clock rate due to single LVDS link). Set "video_pll1" clock rate and "media_ldb" to 490MHz to achieve that. This should be able to suppress this LDB driver warning: [ 17.206644] fsl-ldb 32ec0000.blk-ctrl:bridge@5c: Configured LDB clock (70000000 Hz) does not match requested LVDS clock: 490000000 Hz This also makes the display mode used by the panel pass mode validation against pixel clock rate and "media_ldb" clock rate in a certain display driver. Signed-off-by: Liu Ying --- v6: * No change. v5: * No change. v4: * No change. v3: * New patch. .../dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts index 30962922b361..2c75da5f064f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts @@ -52,7 +52,7 @@ &lcdif2 { &lvds_bridge { /* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */ - assigned-clock-rates = <482300000>; + assigned-clock-rates = <490000000>; status = "okay"; ports { @@ -70,10 +70,10 @@ &media_blk_ctrl { */ assigned-clock-rates = <500000000>, <200000000>, <0>, /* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */ - <68900000>, + <70000000>, <500000000>, - /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */ - <964600000>; + /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB */ + <490000000>; }; &pwm4 {