| Message ID | 20241121-ge-ian-debug-imx8-clk-tree-v1-2-0f1b722588fe@bootlin.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | clk: Fix simple video pipelines on i.MX8 | expand |
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index d02451f951cf057d068f980d985c95deb861a2d9..f171539bbb842f57698249a475c62f3f5719ccd1 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1927,6 +1927,18 @@ long clk_get_accuracy(struct clk *clk) } EXPORT_SYMBOL_GPL(clk_get_accuracy); +__maybe_unused +static unsigned long clk_determine(struct clk_core *core, unsigned long rate) +{ + struct clk_rate_request req = {}; + + clk_hw_init_rate_request(core->hw, &req, rate); + if (__clk_determine_rate(core->hw, &req)) + return 0; + + return req.rate; +} + static unsigned long clk_recalc(struct clk_core *core, unsigned long parent_rate) {
In the context of the clock core, "determine" means we calculate a possible clock rate based on its hardware capabilities and its current upstream parent frequency. This is opposed to "round" which tries to find the best parent and best rate and "recalc" which is about finding the next output clock based on a parent frequency change. The prototype is based on clk_recalc() which does exactly the same for the "recalc" situation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/clk/clk.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)