diff mbox series

[v4,2/7] drm/msm/a6xx: Increase HFI response timeout

Message ID 20250109-gpu-acd-v4-2-08a5efaf4a23@quicinc.com (mailing list archive)
State New
Headers show
Series Support for GPU ACD feature on Adreno X1-85 | expand

Commit Message

Akhil P Oommen Jan. 8, 2025, 8:39 p.m. UTC 
When ACD feature is enabled, it triggers some internal calibrations
which result in a pretty long delay during the first HFI perf vote.
So, increase the HFI response timeout to match the downstream driver.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
---
 drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Neil Armstrong Jan. 9, 2025, 7:54 a.m. UTC | #1 
On 08/01/2025 21:39, Akhil P Oommen wrote:
> When ACD feature is enabled, it triggers some internal calibrations
> which result in a pretty long delay during the first HFI perf vote.
> So, increase the HFI response timeout to match the downstream driver.
> 
> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
> ---
>   drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> index 3c183c1c6266..7d04b242363c 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
> @@ -108,7 +108,7 @@ static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,
>   
>   	/* Wait for a response */
>   	ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val,
> -		val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 5000);
> +		val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 1000000);
>   
>   	if (ret) {
>   		DRM_DEV_ERROR(gmu->dev,
> @@ -725,7 +725,7 @@ static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)
>   	}
>   
>   	/* Send ACD table to GMU */
> -	ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, &msg, sizeof(msg), NULL, 0);
> +	ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, acd_table, sizeof(*acd_table), NULL, 0);
>   	if (ret) {
>   		DRM_DEV_ERROR(gmu->dev, "Unable to ACD table (%d)\n", ret);
>   		return ret;
> 

Ok it's here, this should be on previous patch!

Neil
Akhil P Oommen Jan. 9, 2025, 11:28 a.m. UTC | #2 
On 1/9/2025 1:24 PM, neil.armstrong@linaro.org wrote:
> On 08/01/2025 21:39, Akhil P Oommen wrote:
>> When ACD feature is enabled, it triggers some internal calibrations
>> which result in a pretty long delay during the first HFI perf vote.
>> So, increase the HFI response timeout to match the downstream driver.
>>
>> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
>> ---
>>   drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/
>> msm/adreno/a6xx_hfi.c
>> index 3c183c1c6266..7d04b242363c 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
>> @@ -108,7 +108,7 @@ static int a6xx_hfi_wait_for_ack(struct a6xx_gmu
>> *gmu, u32 id, u32 seqnum,
>>         /* Wait for a response */
>>       ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val,
>> -        val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 5000);
>> +        val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 1000000);
>>         if (ret) {
>>           DRM_DEV_ERROR(gmu->dev,
>> @@ -725,7 +725,7 @@ static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)
>>       }
>>         /* Send ACD table to GMU */
>> -    ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, &msg, sizeof(msg),
>> NULL, 0);
>> +    ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, acd_table,
>> sizeof(*acd_table), NULL, 0);
>>       if (ret) {
>>           DRM_DEV_ERROR(gmu->dev, "Unable to ACD table (%d)\n", ret);
>>           return ret;
>>
> 
> Ok it's here, this should be on previous patch!

Aah! It got messed up when I squashed fixup commits.

-Akhil.

> 
> Neil
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
index 3c183c1c6266..7d04b242363c 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
@@ -108,7 +108,7 @@  static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum,
 
 	/* Wait for a response */
 	ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val,
-		val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 5000);
+		val & A6XX_GMU_GMU2HOST_INTR_INFO_MSGQ, 100, 1000000);
 
 	if (ret) {
 		DRM_DEV_ERROR(gmu->dev,
@@ -725,7 +725,7 @@  static int a6xx_hfi_enable_acd(struct a6xx_gmu *gmu)
 	}
 
 	/* Send ACD table to GMU */
-	ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, &msg, sizeof(msg), NULL, 0);
+	ret = a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_ACD, acd_table, sizeof(*acd_table), NULL, 0);
 	if (ret) {
 		DRM_DEV_ERROR(gmu->dev, "Unable to ACD table (%d)\n", ret);
 		return ret;