From patchwork Thu Feb 6 21:06:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18CEFC0219B for ; Thu, 6 Feb 2025 21:08:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 95C7910E95F; Thu, 6 Feb 2025 21:08:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="T+ch4p64"; dkim-atps=neutral Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1736910E958 for ; Thu, 6 Feb 2025 21:06:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1738876005; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uyXiRhLCxCJ7cDWiLdgm4uDG6RKwnonK4ZO/R1V2Btw=; b=T+ch4p64RiilalWr7xrxFurQqlOM85Uig1gTkVNHGwRQiWCrSjFC/HB9cXKgFxLjUS6jbD 2GJ5s2QiXxj4AN9OlJfdUph+gYD6l0ZrHeVn6D1TyhAelW8LxFhhl54oc7k/hvjV+Ourcu JWEP2yVDGZVlKBKAiTjHhFtM3vhy0yE= Received: from mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-390-cvqiUNRmNMuzKYGLCKRmaA-1; Thu, 06 Feb 2025 16:06:41 -0500 X-MC-Unique: cvqiUNRmNMuzKYGLCKRmaA-1 X-Mimecast-MFC-AGG-ID: cvqiUNRmNMuzKYGLCKRmaA Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 83A8B1955D53; Thu, 6 Feb 2025 21:06:37 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1314B1800879; Thu, 6 Feb 2025 21:06:33 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:01 -0500 Subject: [PATCH 06/14] drm/panel/6e88a0-ams452ef01: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-6-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=3587; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=9CpnIlV7pjwK3l2a889dTo6xEZQ/5+5YEKIgGkmWaFE=; b=/fYjYzQjzYauYNdCdBVWNcVqUVOarIaNYxi0nI0neBfJX589v94GXX2WgchGfX0cvQx9aAb9P +uvEOZNw6yEBRTom6xMYagr9nd88PdeCEZXhUS8t1x5PoA8YnqX5Qk1 X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- .../drm/panel/panel-samsung-s6e88a0-ams452ef01.c | 34 ++++++++++------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c index d2df227abbea557acb849bfc76dd4b561158bf11..fde6852fe911477e4ddc333a779577fcf92bc21f 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c @@ -39,13 +39,14 @@ static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx) static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; dsi->mode_flags |= MIPI_DSI_MODE_LPM; - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands - mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcc, 0x4c); // set Pixel Clock Divider polarity ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -55,23 +56,20 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) msleep(120); // set default brightness/gama - mipi_dsi_dcs_write_seq(dsi, 0xca, - 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB - 0x80, 0x80, 0x80, // V203 R,G,B - 0x80, 0x80, 0x80, // V151 R,G,B - 0x80, 0x80, 0x80, // V87 R,G,B - 0x80, 0x80, 0x80, // V51 R,G,B - 0x80, 0x80, 0x80, // V35 R,G,B - 0x80, 0x80, 0x80, // V23 R,G,B - 0x80, 0x80, 0x80, // V11 R,G,B - 0x6b, 0x68, 0x71, // V3 R,G,B - 0x00, 0x00, 0x00); // V1 R,G,B + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0x01, 0x00, 0x01, 0x00, + 0x01, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x6b, 0x68, 0x71, 0x00, 0x00, + 0x00); // V1 R,G,B // set default Amoled Off Ratio - mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x40, 0x0a, 0x17, 0x00, + 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x2c, 0x0b); // set default elvss voltage + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf7, 0x03); // gamma/aor update + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) {