diff mbox series

[v3,2/2] drm/edid: Refactor DisplayID timing block structs

Message ID 20250214110643.506740-2-sdoregor@sdore.me (mailing list archive)
State New
Headers show
Series [v3,1/2] drm/edid: Implement DisplayID Type IX & X timing blocks parsing | expand

Commit Message

Egor Vorontsov Feb. 14, 2025, 11:06 a.m. UTC 
Using le16 instead of u8[2].

Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Egor Vorontsov <sdoregor@sdore.me>
---
 drivers/gpu/drm/drm_displayid_internal.h | 18 +++++++--------
 drivers/gpu/drm/drm_edid.c               | 28 ++++++++++++------------
 2 files changed, 23 insertions(+), 23 deletions(-)

Comments

Jani Nikula Feb. 14, 2025, 4:05 p.m. UTC | #1 
On Fri, 14 Feb 2025, Egor Vorontsov <sdoregor@sdore.me> wrote:
> Using le16 instead of u8[2].
>
> Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Egor Vorontsov <sdoregor@sdore.me>

The vsync and hsync having high bit indicate polarity makes this less
than perfect, but I think it's fine.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/drm_displayid_internal.h | 18 +++++++--------
>  drivers/gpu/drm/drm_edid.c               | 28 ++++++++++++------------
>  2 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_displayid_internal.h b/drivers/gpu/drm/drm_displayid_internal.h
> index 84831ecfdb6e..957dd0619f5c 100644
> --- a/drivers/gpu/drm/drm_displayid_internal.h
> +++ b/drivers/gpu/drm/drm_displayid_internal.h
> @@ -115,20 +115,20 @@ struct displayid_tiled_block {
>  struct displayid_detailed_timings_1 {
>  	u8 pixel_clock[3];
>  	u8 flags;
> -	u8 hactive[2];
> -	u8 hblank[2];
> -	u8 hsync[2];
> -	u8 hsw[2];
> -	u8 vactive[2];
> -	u8 vblank[2];
> -	u8 vsync[2];
> -	u8 vsw[2];
> +	__le16 hactive;
> +	__le16 hblank;
> +	__le16 hsync;
> +	__le16 hsw;
> +	__le16 vactive;
> +	__le16 vblank;
> +	__le16 vsync;
> +	__le16 vsw;
>  } __packed;
>  
>  struct displayid_detailed_timing_block {
>  	struct displayid_block base;
>  	struct displayid_detailed_timings_1 timings[];
> -};
> +} __packed;
>  
>  struct displayid_formula_timings_9 {
>  	u8 flags;
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 03edf0e1598e..32807cefc819 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -6760,23 +6760,23 @@ static void update_display_info(struct drm_connector *connector,
>  }
>  
>  static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
> -							    struct displayid_detailed_timings_1 *timings,
> +							    const struct displayid_detailed_timings_1 *timings,
>  							    bool type_7)
>  {
>  	struct drm_display_mode *mode;
> -	unsigned pixel_clock = (timings->pixel_clock[0] |
> -				(timings->pixel_clock[1] << 8) |
> -				(timings->pixel_clock[2] << 16)) + 1;
> -	unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
> -	unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
> -	unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
> -	unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
> -	unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
> -	unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
> -	unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
> -	unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
> -	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
> -	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
> +	unsigned int pixel_clock = (timings->pixel_clock[0] |
> +				    (timings->pixel_clock[1] << 8) |
> +				    (timings->pixel_clock[2] << 16)) + 1;
> +	unsigned int hactive = le16_to_cpu(timings->hactive) + 1;
> +	unsigned int hblank = le16_to_cpu(timings->hblank) + 1;
> +	unsigned int hsync = (le16_to_cpu(timings->hsync) & 0x7fff) + 1;
> +	unsigned int hsync_width = le16_to_cpu(timings->hsw) + 1;
> +	unsigned int vactive = le16_to_cpu(timings->vactive) + 1;
> +	unsigned int vblank = le16_to_cpu(timings->vblank) + 1;
> +	unsigned int vsync = (le16_to_cpu(timings->vsync) & 0x7fff) + 1;
> +	unsigned int vsync_width = le16_to_cpu(timings->vsw) + 1;
> +	bool hsync_positive = le16_to_cpu(timings->hsync) & (1 << 15);
> +	bool vsync_positive = le16_to_cpu(timings->vsync) & (1 << 15);
>  
>  	mode = drm_mode_create(dev);
>  	if (!mode)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/drm_displayid_internal.h b/drivers/gpu/drm/drm_displayid_internal.h
index 84831ecfdb6e..957dd0619f5c 100644
--- a/drivers/gpu/drm/drm_displayid_internal.h
+++ b/drivers/gpu/drm/drm_displayid_internal.h
@@ -115,20 +115,20 @@  struct displayid_tiled_block {
 struct displayid_detailed_timings_1 {
 	u8 pixel_clock[3];
 	u8 flags;
-	u8 hactive[2];
-	u8 hblank[2];
-	u8 hsync[2];
-	u8 hsw[2];
-	u8 vactive[2];
-	u8 vblank[2];
-	u8 vsync[2];
-	u8 vsw[2];
+	__le16 hactive;
+	__le16 hblank;
+	__le16 hsync;
+	__le16 hsw;
+	__le16 vactive;
+	__le16 vblank;
+	__le16 vsync;
+	__le16 vsw;
 } __packed;
 
 struct displayid_detailed_timing_block {
 	struct displayid_block base;
 	struct displayid_detailed_timings_1 timings[];
-};
+} __packed;
 
 struct displayid_formula_timings_9 {
 	u8 flags;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 03edf0e1598e..32807cefc819 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6760,23 +6760,23 @@  static void update_display_info(struct drm_connector *connector,
 }
 
 static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
-							    struct displayid_detailed_timings_1 *timings,
+							    const struct displayid_detailed_timings_1 *timings,
 							    bool type_7)
 {
 	struct drm_display_mode *mode;
-	unsigned pixel_clock = (timings->pixel_clock[0] |
-				(timings->pixel_clock[1] << 8) |
-				(timings->pixel_clock[2] << 16)) + 1;
-	unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
-	unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
-	unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
-	unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
-	unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
-	unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
-	unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
-	unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
-	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
-	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
+	unsigned int pixel_clock = (timings->pixel_clock[0] |
+				    (timings->pixel_clock[1] << 8) |
+				    (timings->pixel_clock[2] << 16)) + 1;
+	unsigned int hactive = le16_to_cpu(timings->hactive) + 1;
+	unsigned int hblank = le16_to_cpu(timings->hblank) + 1;
+	unsigned int hsync = (le16_to_cpu(timings->hsync) & 0x7fff) + 1;
+	unsigned int hsync_width = le16_to_cpu(timings->hsw) + 1;
+	unsigned int vactive = le16_to_cpu(timings->vactive) + 1;
+	unsigned int vblank = le16_to_cpu(timings->vblank) + 1;
+	unsigned int vsync = (le16_to_cpu(timings->vsync) & 0x7fff) + 1;
+	unsigned int vsync_width = le16_to_cpu(timings->vsw) + 1;
+	bool hsync_positive = le16_to_cpu(timings->hsync) & (1 << 15);
+	bool vsync_positive = le16_to_cpu(timings->vsync) & (1 << 15);
 
 	mode = drm_mode_create(dev);
 	if (!mode)