| Message ID | 20250217-b4-sm8750-display-v2-14-d201dcdda6a4@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/msm: Add support for SM8750 | expand |
On Mon, Feb 17, 2025 at 05:41:35PM +0100, Krzysztof Kozlowski wrote: > The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and > newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to > set_active_fetch_pipes() to better match the purpose. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Changes in v2: > 1. New patch > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 ++++++------ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 +- > 3 files changed, 10 insertions(+), 10 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 2/17/2025 8:41 AM, Krzysztof Kozlowski wrote: > The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and > newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to > set_active_fetch_pipes() to better match the purpose. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> > > --- > > Changes in v2: > 1. New patch > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 ++++++------ > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 +- > 3 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index 7191b1a6d41b3a96f956d199398f12b2923e8c82..7de79696a21e58a4c640f00265610ccce8b5d253 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -445,9 +445,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, > > uint32_t lm_idx; > bool bg_alpha_enable = false; > - DECLARE_BITMAP(fetch_active, SSPP_MAX); > + DECLARE_BITMAP(active_fetch, SSPP_MAX); > > - memset(fetch_active, 0, sizeof(fetch_active)); > + memset(active_fetch, 0, sizeof(active_fetch)); > drm_atomic_crtc_for_each_plane(plane, crtc) { > state = plane->state; > if (!state) > @@ -464,7 +464,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, > if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) > bg_alpha_enable = true; > > - set_bit(pstate->pipe.sspp->idx, fetch_active); > + set_bit(pstate->pipe.sspp->idx, active_fetch); > _dpu_crtc_blend_setup_pipe(crtc, plane, > mixer, cstate->num_mixers, > pstate->stage, > @@ -472,7 +472,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, > &pstate->pipe, 0, stage_cfg); > > if (pstate->r_pipe.sspp) { > - set_bit(pstate->r_pipe.sspp->idx, fetch_active); > + set_bit(pstate->r_pipe.sspp->idx, active_fetch); > _dpu_crtc_blend_setup_pipe(crtc, plane, > mixer, cstate->num_mixers, > pstate->stage, > @@ -492,8 +492,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, > } > } > > - if (ctl->ops.set_active_pipes) > - ctl->ops.set_active_pipes(ctl, fetch_active); > + if (ctl->ops.set_active_fetch_pipes) > + ctl->ops.set_active_fetch_pipes(ctl, active_fetch); > > _dpu_crtc_program_lm_output_roi(crtc); > } > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > index 9d4866509e97c262006e15cf3e02a2f1ca851784..2e1e22589f730d1a60c3cbf6ad6b6aeaea38c6fb 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > @@ -675,8 +675,8 @@ static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx, > } > } > > -static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx, > - unsigned long *fetch_active) > +static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx, > + unsigned long *fetch_active) > { > int i; > u32 val = 0; > @@ -764,7 +764,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev, > c->ops.update_pending_flush_dspp = dpu_hw_ctl_update_pending_flush_dspp; > > if (mdss_ver->core_major_ver >= 7) > - c->ops.set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active; > + c->ops.set_active_fetch_pipes = dpu_hw_ctl_set_active_fetch_pipes; > > c->idx = cfg->id; > c->mixer_count = mixer_count; > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h > index f04ae0b1d986fa8f73e5bf96babfca3b4f3a0bf5..b8bd5b22c5f8dadd01c16c352efef4063f2614a6 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h > @@ -243,7 +243,7 @@ struct dpu_hw_ctl_ops { > void (*setup_blendstage)(struct dpu_hw_ctl *ctx, > enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg); > > - void (*set_active_pipes)(struct dpu_hw_ctl *ctx, > + void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx, > unsigned long *fetch_active); > }; > > > -- > 2.43.0 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 7191b1a6d41b3a96f956d199398f12b2923e8c82..7de79696a21e58a4c640f00265610ccce8b5d253 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -445,9 +445,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, uint32_t lm_idx; bool bg_alpha_enable = false; - DECLARE_BITMAP(fetch_active, SSPP_MAX); + DECLARE_BITMAP(active_fetch, SSPP_MAX); - memset(fetch_active, 0, sizeof(fetch_active)); + memset(active_fetch, 0, sizeof(active_fetch)); drm_atomic_crtc_for_each_plane(plane, crtc) { state = plane->state; if (!state) @@ -464,7 +464,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) bg_alpha_enable = true; - set_bit(pstate->pipe.sspp->idx, fetch_active); + set_bit(pstate->pipe.sspp->idx, active_fetch); _dpu_crtc_blend_setup_pipe(crtc, plane, mixer, cstate->num_mixers, pstate->stage, @@ -472,7 +472,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, &pstate->pipe, 0, stage_cfg); if (pstate->r_pipe.sspp) { - set_bit(pstate->r_pipe.sspp->idx, fetch_active); + set_bit(pstate->r_pipe.sspp->idx, active_fetch); _dpu_crtc_blend_setup_pipe(crtc, plane, mixer, cstate->num_mixers, pstate->stage, @@ -492,8 +492,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, } } - if (ctl->ops.set_active_pipes) - ctl->ops.set_active_pipes(ctl, fetch_active); + if (ctl->ops.set_active_fetch_pipes) + ctl->ops.set_active_fetch_pipes(ctl, active_fetch); _dpu_crtc_program_lm_output_roi(crtc); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 9d4866509e97c262006e15cf3e02a2f1ca851784..2e1e22589f730d1a60c3cbf6ad6b6aeaea38c6fb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -675,8 +675,8 @@ static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx, } } -static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx, - unsigned long *fetch_active) +static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx, + unsigned long *fetch_active) { int i; u32 val = 0; @@ -764,7 +764,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev, c->ops.update_pending_flush_dspp = dpu_hw_ctl_update_pending_flush_dspp; if (mdss_ver->core_major_ver >= 7) - c->ops.set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active; + c->ops.set_active_fetch_pipes = dpu_hw_ctl_set_active_fetch_pipes; c->idx = cfg->id; c->mixer_count = mixer_count; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h index f04ae0b1d986fa8f73e5bf96babfca3b4f3a0bf5..b8bd5b22c5f8dadd01c16c352efef4063f2614a6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -243,7 +243,7 @@ struct dpu_hw_ctl_ops { void (*setup_blendstage)(struct dpu_hw_ctl *ctx, enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg); - void (*set_active_pipes)(struct dpu_hw_ctl *ctx, + void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx, unsigned long *fetch_active); };
The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to set_active_fetch_pipes() to better match the purpose. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes in v2: 1. New patch --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 ++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-)