From patchwork Wed Feb 19 09:17:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13981830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9DE5DC021B5 for ; Wed, 19 Feb 2025 09:32:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9C07910E7D4; Wed, 19 Feb 2025 09:32:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="CMaLYvPz"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id E3BC310E79B; Wed, 19 Feb 2025 09:32:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739957523; x=1771493523; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=u5bjDgqW+g6qffOrSLcIjtm75P8AAaC3vftEkokJv3s=; b=CMaLYvPz0HKse0W/yyxdCt85autIvGHUmZNNtSPffTg2Jrb1GtwwSwii i5v/zq+OrMWwS4fpuwI5nYYVVanYVyBNw8UwjHnKo7IDKRcyrKpgBriAh dN46hTZPeIslUd+jqvMXDf77Aizgj/vurp7196gjnZXl1TzGKyYq7tsc+ xBHGKWjEbzfdeIabLGz6OV5qgPaHXTwuRgNJB5kpHQTAy5LmVJaE1JbmW BVJ4IreLv77KU3Qyq9a7APbk4o/9mgAZR2GdVx53r2fZNvpKSwrMIh83w b660TUZNePeZwniesLycRIG0wK2w01iUiPX+6JoLPMw6ZS87CnmmgC0yt w==; X-CSE-ConnectionGUID: vPxoT0RBTpuYKT5DeJ87sA== X-CSE-MsgGUID: hylR/QWwT5KWwlAXkxGLnw== X-IronPort-AV: E=McAfee;i="6700,10204,11348"; a="40551471" X-IronPort-AV: E=Sophos;i="6.13,298,1732608000"; d="scan'208";a="40551471" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Feb 2025 01:32:02 -0800 X-CSE-ConnectionGUID: RfVp7FUUQMyDjaRE9Z9p3A== X-CSE-MsgGUID: DuZc18bkTganPk3qqUId5Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="137910324" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa002.fm.intel.com with ESMTP; 19 Feb 2025 01:32:00 -0800 From: Arun R Murthy Date: Wed, 19 Feb 2025 14:47:23 +0530 Subject: [PATCH v6 1/3] drm/plane: Add new plane property IN_FORMATS_ASYNC MIME-Version: 1.0 Message-Id: <20250219-asyn-v6-1-b959e6becb3c@intel.com> References: <20250219-asyn-v6-0-b959e6becb3c@intel.com> In-Reply-To: <20250219-asyn-v6-0-b959e6becb3c@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, Arun R Murthy , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There exists a property IN_FORMATS which exposes the plane supported modifiers/formats to the user. In some platforms when asynchronous flip are used all of modifiers/formats mentioned in IN_FORMATS are not supported. This patch adds a new plane property IN_FORMATS_ASYNC to expose the async flip supported modifiers/formats so that user can use this information ahead and do flip with unsupported formats/modifiers. This will save flip failures. Add a new function pointer similar to format_mod_supported specifically for asynchronous flip. v2: Remove async variable from drm_plane (Ville) v3: Add new function pointer for async (Ville) v5: Typo corrected in commit message & some correction in the kernel documentation. (Chaitanya) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_mode_config.c | 7 +++++++ drivers/gpu/drm/drm_plane.c | 8 ++++++++ include/drm/drm_mode_config.h | 6 ++++++ include/drm/drm_plane.h | 17 +++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 8642a2fb25a90116dab975aa0ab6b51deafb4b96..dbbef20753f834a85ae9ded748cff2b3f0e85043 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -388,6 +388,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.size_hints_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "IN_FORMATS_ASYNC", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.async_modifiers_property = prop; + return 0; } diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index a28b22fdd7a41aca82d097d42237851da9a0a79b..fe181c1002171acc68d3054c2d178f9b9f501fe2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -141,6 +141,14 @@ * various bugs in this area with inconsistencies between the capability * flag and per-plane properties. * + * IN_FORMATS_ASYNC: + * Blob property which contains the set of buffer format and modifier + * pairs supported by this plane for asynchronous flips. The blob is a struct + * drm_format_modifier_blob. Userspace cannot change this property. This is an + * optional property and if not present then user should expect a failure in + * atomic ioctl when the modifier/format is not supported by that plane under + * asynchronous flip. + * * SIZE_HINTS: * Blob property which contains the set of recommended plane size * which can used for simple "cursor like" use cases (eg. no scaling). diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 271765e2e9f2da62aaf0d258828ef4196e14822e..0c116d6dfd277262b1a4c0f097fce2d719f43844 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -936,6 +936,12 @@ struct drm_mode_config { */ struct drm_property *modifiers_property; + /** + * @async_modifiers_property: Plane property to list support modifier/format + * combination for asynchronous flips. + */ + struct drm_property *async_modifiers_property; + /** * @size_hints_property: Plane SIZE_HINTS property. */ diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index dd718c62ac31bf16606f3ee9f025a5b171cd1e67..4393a0e9edf91ccfd78ef62b168b9313187c1a81 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -549,6 +549,23 @@ struct drm_plane_funcs { */ bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format, uint64_t modifier); + /** + * @format_mod_supported_async: + * + * This optional hook is used for the DRM to determine if for + * asynchronous flip the given format/modifier combination is valid for + * the plane. This allows the DRM to generate the correct format + * bitmask (which formats apply to which modifier), and to validate + * modifiers at atomic_check time. + * + * Returns: + * + * True if the given modifier is valid for that format on the plane. + * False otherwise. + */ + bool (*format_mod_supported_async)(struct drm_plane *plane, + uint32_t format, uint64_t modifier); + }; /**