diff mbox series

drm/radeon: Add error handlings for r420 cp errata initiation

Message ID 20250220064050.686-1-vulab@iscas.ac.cn (mailing list archive)
State New
Headers show
Series drm/radeon: Add error handlings for r420 cp errata initiation | expand

Commit Message

Wentao Liang Feb. 20, 2025, 6:40 a.m. UTC
In r420_cp_errata_init(), the RESYNC information is stored even
when the Scratch register is not correctly allocated.

Change the return type of r420_cp_errata_init() from void to int
to propagate errors to the caller. Add error checking after
radeon_scratch_get() to ensure RESYNC information is stored
to an allocated address. Log an error message and return the
error code immediately when radeon_scratch_get() fails.
Additionally, handle the return value of r420_cp_errata_init() in
r420_startup() to log an appropriate error message and propagate
the error if initialization fails.

Fixes: 62cdc0c20663 ("drm/radeon/kms: Workaround RV410/R420 CP errata (V3)")
Cc: stable@vger.kernel.org # 2.6.33+
Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
---
 drivers/gpu/drm/radeon/r420.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

Comments

kernel test robot Feb. 21, 2025, 9:49 a.m. UTC | #1
Hi Wentao,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-exynos/exynos-drm-next]
[also build test WARNING on linus/master v6.14-rc3 next-20250220]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Wentao-Liang/drm-radeon-Add-error-handlings-for-r420-cp-errata-initiation/20250220-144327
base:   https://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git exynos-drm-next
patch link:    https://lore.kernel.org/r/20250220064050.686-1-vulab%40iscas.ac.cn
patch subject: [PATCH] drm/radeon: Add error handlings for r420 cp errata initiation
config: i386-buildonly-randconfig-005-20250221 (https://download.01.org/0day-ci/archive/20250221/202502211718.EFZaW3pW-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250221/202502211718.EFZaW3pW-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502211718.EFZaW3pW-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/radeon/r420.c:229:1: warning: non-void function does not return a value in all control paths [-Wreturn-type]
     229 | }
         | ^
   1 warning generated.


vim +229 drivers/gpu/drm/radeon/r420.c

9f022ddfb23793 Jerome Glisse   2009-09-11  206  
fe881d3e554a1f Wentao Liang    2025-02-20  207  static int r420_cp_errata_init(struct radeon_device *rdev)
62cdc0c20663ef Corbin Simpson  2010-01-06  208  {
c346fb74fb6463 Pan Bian        2017-04-24  209  	int r;
e32eb50dbe4386 Christian König 2011-10-23  210  	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
7b1f2485db253a Christian König 2011-09-23  211  
62cdc0c20663ef Corbin Simpson  2010-01-06  212  	/* RV410 and R420 can lock up if CP DMA to host memory happens
62cdc0c20663ef Corbin Simpson  2010-01-06  213  	 * while the 2D engine is busy.
62cdc0c20663ef Corbin Simpson  2010-01-06  214  	 *
62cdc0c20663ef Corbin Simpson  2010-01-06  215  	 * The proper workaround is to queue a RESYNC at the beginning
62cdc0c20663ef Corbin Simpson  2010-01-06  216  	 * of the CP init, apparently.
62cdc0c20663ef Corbin Simpson  2010-01-06  217  	 */
fe881d3e554a1f Wentao Liang    2025-02-20  218  	r = radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
fe881d3e554a1f Wentao Liang    2025-02-20  219  	if (r) {
fe881d3e554a1f Wentao Liang    2025-02-20  220  		DRM_ERROR("failed to get scratch reg (%d).\n", r);
fe881d3e554a1f Wentao Liang    2025-02-20  221  		return r;
fe881d3e554a1f Wentao Liang    2025-02-20  222  	}
c346fb74fb6463 Pan Bian        2017-04-24  223  	r = radeon_ring_lock(rdev, ring, 8);
c346fb74fb6463 Pan Bian        2017-04-24  224  	WARN_ON(r);
e32eb50dbe4386 Christian König 2011-10-23  225  	radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1));
e32eb50dbe4386 Christian König 2011-10-23  226  	radeon_ring_write(ring, rdev->config.r300.resync_scratch);
e32eb50dbe4386 Christian König 2011-10-23  227  	radeon_ring_write(ring, 0xDEADBEEF);
1538a9e0e04f6a Michel Dänzer   2014-08-18  228  	radeon_ring_unlock_commit(rdev, ring, false);
62cdc0c20663ef Corbin Simpson  2010-01-06 @229  }
62cdc0c20663ef Corbin Simpson  2010-01-06  230
Alex Deucher Feb. 21, 2025, 3:14 p.m. UTC | #2
On Thu, Feb 20, 2025 at 1:41 AM Wentao Liang <vulab@iscas.ac.cn> wrote:
>
> In r420_cp_errata_init(), the RESYNC information is stored even
> when the Scratch register is not correctly allocated.
>
> Change the return type of r420_cp_errata_init() from void to int
> to propagate errors to the caller. Add error checking after
> radeon_scratch_get() to ensure RESYNC information is stored
> to an allocated address. Log an error message and return the
> error code immediately when radeon_scratch_get() fails.
> Additionally, handle the return value of r420_cp_errata_init() in
> r420_startup() to log an appropriate error message and propagate
> the error if initialization fails.
>
> Fixes: 62cdc0c20663 ("drm/radeon/kms: Workaround RV410/R420 CP errata (V3)")
> Cc: stable@vger.kernel.org # 2.6.33+
> Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
> ---
>  drivers/gpu/drm/radeon/r420.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
> index 9a31cdec6415..67c55153cba8 100644
> --- a/drivers/gpu/drm/radeon/r420.c
> +++ b/drivers/gpu/drm/radeon/r420.c
> @@ -204,7 +204,7 @@ static void r420_clock_resume(struct radeon_device *rdev)
>         WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
>  }
>
> -static void r420_cp_errata_init(struct radeon_device *rdev)
> +static int r420_cp_errata_init(struct radeon_device *rdev)

You changed the function signature, but you didn't adjust the function
behavior to match.

Alex

>  {
>         int r;
>         struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
> @@ -215,7 +215,11 @@ static void r420_cp_errata_init(struct radeon_device *rdev)
>          * The proper workaround is to queue a RESYNC at the beginning
>          * of the CP init, apparently.
>          */
> -       radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
> +       r = radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
> +       if (r) {
> +               DRM_ERROR("failed to get scratch reg (%d).\n", r);
> +               return r;
> +       }
>         r = radeon_ring_lock(rdev, ring, 8);
>         WARN_ON(r);
>         radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1));
> @@ -290,8 +294,11 @@ static int r420_startup(struct radeon_device *rdev)
>                 dev_err(rdev->dev, "failed initializing CP (%d).\n", r);
>                 return r;
>         }
> -       r420_cp_errata_init(rdev);
> -
> +       r = r420_cp_errata_init(rdev);
> +       if (r) {
> +               dev_err(rdev->dev, "failed initializing CP errata workaround (%d).\n", r);
> +               return r;
> +       }
>         r = radeon_ib_pool_init(rdev);
>         if (r) {
>                 dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
> --
> 2.42.0.windows.2
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 9a31cdec6415..67c55153cba8 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -204,7 +204,7 @@  static void r420_clock_resume(struct radeon_device *rdev)
 	WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
 }
 
-static void r420_cp_errata_init(struct radeon_device *rdev)
+static int r420_cp_errata_init(struct radeon_device *rdev)
 {
 	int r;
 	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
@@ -215,7 +215,11 @@  static void r420_cp_errata_init(struct radeon_device *rdev)
 	 * The proper workaround is to queue a RESYNC at the beginning
 	 * of the CP init, apparently.
 	 */
-	radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
+	r = radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
+	if (r) {
+		DRM_ERROR("failed to get scratch reg (%d).\n", r);
+		return r;
+	}
 	r = radeon_ring_lock(rdev, ring, 8);
 	WARN_ON(r);
 	radeon_ring_write(ring, PACKET0(R300_CP_RESYNC_ADDR, 1));
@@ -290,8 +294,11 @@  static int r420_startup(struct radeon_device *rdev)
 		dev_err(rdev->dev, "failed initializing CP (%d).\n", r);
 		return r;
 	}
-	r420_cp_errata_init(rdev);
-
+	r = r420_cp_errata_init(rdev);
+	if (r) {
+		dev_err(rdev->dev, "failed initializing CP errata workaround (%d).\n", r);
+		return r;
+	}
 	r = radeon_ib_pool_init(rdev);
 	if (r) {
 		dev_err(rdev->dev, "IB initialization failed (%d).\n", r);