From patchwork Thu Feb 27 20:07:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil P Oommen X-Patchwork-Id: 13995188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BC865C197BF for ; Thu, 27 Feb 2025 20:09:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3CDFE10EB80; Thu, 27 Feb 2025 20:09:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.b="H9Xc1HEL"; dkim-atps=neutral Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9C82E10EB8F; Thu, 27 Feb 2025 20:09:05 +0000 (UTC) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51RJh6CM005908; Thu, 27 Feb 2025 20:09:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= bFt7JNc7ycTLNzpFHX3n2L16akbvJLXZgB/XjDUidug=; b=H9Xc1HEL16LpaMBe G1GteoCqDF0vMS3Grc/hpnk35DWOODtQ4bpFTxRn3QXdERe+3KhZcwPZh82FUCHY hnTDI1Y5QzwnJhp35LW/Per8dHnFqN3/Wp775qwCgi0gMzCFc7BjiBIDTdmDJP3C e9lqVjoTZ9dQ1sPGMt8kwLSvg9oqLV2Y5JCq1/WSaUAupGH2xkhB5MNnBYw0UMyv eI2GbPO7f/IHf8D3qvwPr4/eTgpfBSz2ZokpS+XZnh91/b9wFP/vykjWOIgIfKOy WY0HyHGfaThoUVATGlKbMinO4sa5hiJnziDet3haSKWWygrMhuNCrQWRzxQPhv+n 4/1nuQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 452nmqstnn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Feb 2025 20:09:00 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51RK90TG026075 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Feb 2025 20:09:00 GMT Received: from [10.213.111.143] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 27 Feb 2025 12:08:54 -0800 From: Akhil P Oommen Date: Fri, 28 Feb 2025 01:37:53 +0530 Subject: [PATCH v2 5/6] arm64: dts: qcom: qcs8300: Add gpu and gmu nodes MIME-Version: 1.0 Message-ID: <20250228-a623-gpu-support-v2-5-aea654ecc1d3@quicinc.com> References: <20250228-a623-gpu-support-v2-0-aea654ecc1d3@quicinc.com> In-Reply-To: <20250228-a623-gpu-support-v2-0-aea654ecc1d3@quicinc.com> To: Rob Clark , Sean Paul , "Konrad Dybcio" , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , "Simona Vetter" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson CC: , , , , , Jie Zhang , "Akhil P Oommen" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1740686902; l=3495; i=quic_akhilpo@quicinc.com; s=20240726; h=from:subject:message-id; bh=PTx0csitXBghbJoeYbX8hCDYUxJ59qg+dStMebtmjEc=; b=lkcnjBvvcSXG0sqzOaDNS6PVcSnpiXaSO7Syzs7Lfyo032J9UMgebXS1Y2MjPCrx+uABA3FXv i6U68nIWbCVCLbxtJXwYmCmwRNLjPcYSdswP30phiIESko0bpbLSW/Q X-Developer-Key: i=quic_akhilpo@quicinc.com; a=ed25519; pk=lmVtttSHmAUYFnJsQHX80IIRmYmXA4+CzpGcWOOsfKA= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: IuLlJzTyjMXop_ShaQcD0UB7pL8K7HOl X-Proofpoint-ORIG-GUID: IuLlJzTyjMXop_ShaQcD0UB7pL8K7HOl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-27_07,2025-02-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=749 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270149 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Jie Zhang Add gpu and gmu nodes for qcs8300 chipset. Signed-off-by: Jie Zhang Signed-off-by: Akhil P Oommen --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 93 +++++++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index f1c90db7b0e689035fbbaaa551611be34adf9ab6..2dc487dcc584cd0a057e18c53e2f945b8636ad14 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -2660,6 +2660,99 @@ serdes0: phy@8909000 { status = "disabled"; }; + gpu: gpu@3d00000 { + compatible = "qcom,adreno-623.0", "qcom,adreno"; + reg = <0x0 0x03d00000 0x0 0x40000>, + <0x0 0x03d9e000 0x0 0x1000>, + <0x0 0x03d61000 0x0 0x800>; + reg-names = "kgsl_3d0_reg_memory", + "cx_mem", + "cx_dbgc"; + interrupts = ; + iommus = <&adreno_smmu 0 0xc00>, + <&adreno_smmu 1 0xc00>; + operating-points-v2 = <&gpu_opp_table>; + qcom,gmu = <&gmu>; + interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "gfx-mem"; + #cooling-cells = <2>; + + status = "disabled"; + + gpu_zap_shader: zap-shader { + memory-region = <&gpu_microcode_mem>; + }; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-877000000 { + opp-hz = /bits/ 64 <877000000>; + opp-level = ; + opp-peak-kBps = <12484375>; + }; + + opp-780000000 { + opp-hz = /bits/ 64 <780000000>; + opp-level = ; + opp-peak-kBps = <10687500>; + }; + + opp-599000000 { + opp-hz = /bits/ 64 <599000000>; + opp-level = ; + opp-peak-kBps = <8171875>; + }; + + opp-479000000 { + opp-hz = /bits/ 64 <479000000>; + opp-level = ; + opp-peak-kBps = <5285156>; + }; + }; + }; + + gmu: gmu@3d6a000 { + compatible = "qcom,adreno-gmu-623.0", "qcom,adreno-gmu"; + reg = <0x0 0x03d6a000 0x0 0x34000>, + <0x0 0x03de0000 0x0 0x10000>, + <0x0 0x0b290000 0x0 0x10000>; + reg-names = "gmu", "rscc", "gmu_pdc"; + interrupts = , + ; + interrupt-names = "hfi", "gmu"; + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>, + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; + clock-names = "gmu", + "cxo", + "axi", + "memnoc", + "ahb", + "hub", + "smmu_vote"; + power-domains = <&gpucc GPU_CC_CX_GDSC>, + <&gpucc GPU_CC_GX_GDSC>; + power-domain-names = "cx", + "gx"; + iommus = <&adreno_smmu 5 0xc00>; + operating-points-v2 = <&gmu_opp_table>; + + gmu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-level = ; + }; + }; + }; + gpucc: clock-controller@3d90000 { compatible = "qcom,qcs8300-gpucc"; reg = <0x0 0x03d90000 0x0 0xa000>;