From patchwork Thu Mar 6 01:26:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 14003733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33210C19F32 for ; Thu, 6 Mar 2025 01:26:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F44E10E8C2; Thu, 6 Mar 2025 01:26:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="HL6x5lVZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 73CE710E897; Thu, 6 Mar 2025 01:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741224359; x=1772760359; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mzomJ9BJ8Mdv0tNYnIghG4EHsOIsMlVoZGx9nCaoEIg=; b=HL6x5lVZxKPNWpU45p5qSKST3S0mvZF5I4BOnPJjw/L7IlIYCokhBBNC XbCasGbHFiY0DaMsWWqzIZZcpdjd8WJqRnvn2BUw+jU7Kjxe4zj7IJpH0 Wne1WN+4QfFsomRmLS6LpB/20x//JZllw4lIpkY86paS+Orvt0kNkCida +NYwUBMP1m8FulW5nDZ4DqGaD9RCG8kMRToC5Ho26np8LNYIxFKlg1MfH xl++eMVkXWAqi4bmBqNP0+qzoHL/V3EWVGdVjkPq/+GR4vAEcIKcMf2TD I6a1yuvqpySIKVCLAx7nj8OwRTIOQUYtjvGRweAsVUDWkFjloq9oPoGrf w==; X-CSE-ConnectionGUID: iT+zvjQkR8i6GG6bTsO91Q== X-CSE-MsgGUID: prxsKo7aR8eyeBTRETxr9w== X-IronPort-AV: E=McAfee;i="6700,10204,11363"; a="52427404" X-IronPort-AV: E=Sophos;i="6.14,224,1736841600"; d="scan'208";a="52427404" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 17:25:54 -0800 X-CSE-ConnectionGUID: IqoQFK0gTf6JxmGpxwclYg== X-CSE-MsgGUID: xyk0dFKgSxuZA5mTbJCtGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="124063299" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2025 17:25:54 -0800 From: Matthew Brost To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: himal.prasad.ghimiray@intel.com, apopple@nvidia.com, airlied@gmail.com, thomas.hellstrom@linux.intel.com, simona.vetter@ffwll.ch, felix.kuehling@amd.com, dakr@kernel.org Subject: [PATCH v7 22/32] drm/xe: Add drm_gpusvm_devmem to xe_bo Date: Wed, 5 Mar 2025 17:26:47 -0800 Message-Id: <20250306012657.3505757-23-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250306012657.3505757-1-matthew.brost@intel.com> References: <20250306012657.3505757-1-matthew.brost@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add drm_gpusvm_devmem to xe_bo. Required to enable SVM migrations. Signed-off-by: Matthew Brost Reviewed-by: Thomas Hellström Reviewed-by: Himal Prasad Ghimiray --- drivers/gpu/drm/xe/xe_bo_types.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h index 60c522866500..15a92e3d4898 100644 --- a/drivers/gpu/drm/xe/xe_bo_types.h +++ b/drivers/gpu/drm/xe/xe_bo_types.h @@ -8,6 +8,7 @@ #include +#include #include #include #include @@ -80,6 +81,9 @@ struct xe_bo { */ u16 cpu_caching; + /** @devmem_allocation: SVM device memory allocation */ + struct drm_gpusvm_devmem devmem_allocation; + /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */ struct list_head vram_userfault_link;