From patchwork Sat Mar 8 05:38:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 14007425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A3BFC28B2F for ; Sat, 8 Mar 2025 05:38:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3673810E1FB; Sat, 8 Mar 2025 05:38:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="M4I4z4V+"; dkim-atps=neutral Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6746F10E29E; Sat, 8 Mar 2025 05:38:42 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 1E1A1A45415; Sat, 8 Mar 2025 05:33:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F116DC4CEE4; Sat, 8 Mar 2025 05:38:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741412321; bh=FDtosoc8onqKNTJS3BmCyd4MsOqoUDDRptAoDNrSAWs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=M4I4z4V+fzKIzOu/PMwNo+1cXjj6k0A+k2c74E5D6g6nfZJAnJAileu3ik6zyfeoZ fi56PFxaLCIRJPrQlSyXoNs2MVrPOK0xWSuac78fUH1Tee4e+QhS+EMdpXqJcDhJiw HbCXAss3vTyYNvUTPP9/tJKWfL6Bi9r4ZAS4BMCCtUxD2VN33WjDLixoCJxIcRUZXW dsFhA6s22MqxuvPY4HeZkZvmfUX7wOc9JHngsxUS2gAVVP12wHnlieKXuL7CF9P0Jm HFXYlF9orQDhLAyLbyQG+1xZ6y3K56r3LDpETQFh3I9+IVmqlRcw6lDvWzXvH9J+Ey XILyII4Em6/Ww== From: Dmitry Baryshkov Date: Sat, 08 Mar 2025 07:38:27 +0200 Subject: [PATCH 4/5] drm/msm/dpu: enable SmartDMA on SM8550 MIME-Version: 1.0 Message-Id: <20250308-dpu-rework-vig-masks-v1-4-f1b5d101ae0b@linaro.org> References: <20250308-dpu-rework-vig-masks-v1-0-f1b5d101ae0b@linaro.org> In-Reply-To: <20250308-dpu-rework-vig-masks-v1-0-f1b5d101ae0b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3070; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=vsSWljJKqcGPYKBGji+J7djNw3+R9IwpvZxdugaBxqY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBny9fTf2V6d5zYkpVs2C1OHP4UIhl/T3Xlv4AEo CaSs+7yAtqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ8vX0wAKCRCLPIo+Aiko 1VxaB/9EegACg1zIQI1EC2ClSM+LwXNU1Dyh3NQ+ZJFr8WZgJHFJUFjGZD8/O4p3KBCuVnhspsg nam4W284vzm/C/CEzGz7R4MroVQq4gNOZ/BG2dl7yDIFgUQ+0Za0cP1TCEmL7Ce8FqOV+8Oz7kF ipSL7IecXVwTI7t6WuLiN+1kA371teotB2aA2CwVv6CgtNNr41iv9fqrMvkEafInp0kNE1vH9Iz jx8OA/FXZBuCgr/19n4s9LpNwiO6Cf4wOE6xobYyN66uRqxNB9RlkkYmP3niQ4QphMgD0C1hXdj JPkXVg6w2KTO+fp2ihxv2wUBaeqy3Ggt23Pn+4HWAkHMQlgU X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Abhinav Kumar In order to support more versatile configuration of the display pipes on SM8550, enable SmartDMA for this platform. Signed-off-by: Dmitry Baryshkov --- .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h index a5b90e5e31202900c0bb5bc4a705a6b269005474..2379e119c8c5cb9d68cfaa4feea990ce7e24d569 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -66,70 +66,70 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = { { .name = "sspp_0", .id = SSPP_VIG0, .base = 0x4000, .len = 0x344, - .features = VIG_SDM845_MASK, + .features = VIG_SDM845_MASK_SDMA, .sblk = &dpu_vig_sblk_qseed3_3_2, .xin_id = 0, .type = SSPP_TYPE_VIG, }, { .name = "sspp_1", .id = SSPP_VIG1, .base = 0x6000, .len = 0x344, - .features = VIG_SDM845_MASK, + .features = VIG_SDM845_MASK_SDMA, .sblk = &dpu_vig_sblk_qseed3_3_2, .xin_id = 4, .type = SSPP_TYPE_VIG, }, { .name = "sspp_2", .id = SSPP_VIG2, .base = 0x8000, .len = 0x344, - .features = VIG_SDM845_MASK, + .features = VIG_SDM845_MASK_SDMA, .sblk = &dpu_vig_sblk_qseed3_3_2, .xin_id = 8, .type = SSPP_TYPE_VIG, }, { .name = "sspp_3", .id = SSPP_VIG3, .base = 0xa000, .len = 0x344, - .features = VIG_SDM845_MASK, + .features = VIG_SDM845_MASK_SDMA, .sblk = &dpu_vig_sblk_qseed3_3_2, .xin_id = 12, .type = SSPP_TYPE_VIG, }, { .name = "sspp_8", .id = SSPP_DMA0, .base = 0x24000, .len = 0x344, - .features = DMA_SDM845_MASK, + .features = DMA_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 1, .type = SSPP_TYPE_DMA, }, { .name = "sspp_9", .id = SSPP_DMA1, .base = 0x26000, .len = 0x344, - .features = DMA_SDM845_MASK, + .features = DMA_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 5, .type = SSPP_TYPE_DMA, }, { .name = "sspp_10", .id = SSPP_DMA2, .base = 0x28000, .len = 0x344, - .features = DMA_SDM845_MASK, + .features = DMA_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 9, .type = SSPP_TYPE_DMA, }, { .name = "sspp_11", .id = SSPP_DMA3, .base = 0x2a000, .len = 0x344, - .features = DMA_SDM845_MASK, + .features = DMA_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 13, .type = SSPP_TYPE_DMA, }, { .name = "sspp_12", .id = SSPP_DMA4, .base = 0x2c000, .len = 0x344, - .features = DMA_CURSOR_SDM845_MASK, + .features = DMA_CURSOR_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 14, .type = SSPP_TYPE_DMA, }, { .name = "sspp_13", .id = SSPP_DMA5, .base = 0x2e000, .len = 0x344, - .features = DMA_CURSOR_SDM845_MASK, + .features = DMA_CURSOR_SDM845_MASK_SDMA, .sblk = &dpu_dma_sblk, .xin_id = 15, .type = SSPP_TYPE_DMA,