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[81.240.10.146]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5e816afe223sm26732a12.70.2025.03.12.16.23.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Mar 2025 16:23:20 -0700 (PDT) From: Philippe Simons To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Andre Przywara , =?utf-8?q?Jernej_=C5=A0krabec?= Subject: [PATCH 1/2] drm/panfrost: Add PM runtime flags Date: Thu, 13 Mar 2025 00:23:18 +0100 Message-ID: <20250312232319.25712-2-simons.philippe@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250312232319.25712-1-simons.philippe@gmail.com> References: <20250312232319.25712-1-simons.philippe@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" When the GPU is the only device attached to a single power domain, core genpd disable and enable it when gpu enter and leave runtime suspend. Some power-domain requires a sequence before disabled, and the reverse when enabled. Add PM flags for CLK and RST, and implement in panfrost_device_runtime_suspend/resume. Signed-off-by: Philippe Simons --- drivers/gpu/drm/panfrost/panfrost_device.c | 37 ++++++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_device.h | 4 +++ 2 files changed, 41 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index a45e4addcc19..189ad2ad2b32 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -406,11 +406,38 @@ void panfrost_device_reset(struct panfrost_device *pfdev) static int panfrost_device_runtime_resume(struct device *dev) { struct panfrost_device *pfdev = dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_RST_ASRT)) { + ret = reset_control_deassert(pfdev->rstc); + if (ret) + return ret; + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_CLK_DIS)) { + ret = clk_enable(pfdev->clock); + if (ret) + goto err_clk; + + if (pfdev->bus_clock) { + ret = clk_enable(pfdev->bus_clock); + if (ret) + goto err_bus_clk; + } + } panfrost_device_reset(pfdev); panfrost_devfreq_resume(pfdev); return 0; + +err_bus_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_CLK_DIS)) + clk_disable(pfdev->clock); +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_RST_ASRT)) + reset_control_assert(pfdev->rstc); + return ret; } static int panfrost_device_runtime_suspend(struct device *dev) @@ -426,6 +453,16 @@ static int panfrost_device_runtime_suspend(struct device *dev) panfrost_gpu_suspend_irq(pfdev); panfrost_gpu_power_off(pfdev); + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_CLK_DIS)) { + if (pfdev->bus_clock) + clk_disable(pfdev->bus_clock); + + clk_disable(pfdev->clock); + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT_RST_ASRT)) + reset_control_assert(pfdev->rstc); + return 0; } diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h index cffcb0ac7c11..f372d4819262 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -36,10 +36,14 @@ enum panfrost_drv_comp_bits { * enum panfrost_gpu_pm - Supported kernel power management features * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend + * @GPU_PM_RT_CLK_DIS: Allow disabling clocks during system runtime suspend + * @GPU_PM_RST_ASRT: Allow asserting the reset control during runtime suspend */ enum panfrost_gpu_pm { GPU_PM_CLK_DIS, GPU_PM_VREG_OFF, + GPU_PM_RT_CLK_DIS, + GPU_PM_RT_RST_ASRT }; struct panfrost_features {