@@ -580,6 +580,7 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi,
unsigned long dsi_hss_hsa_hse_hbp;
unsigned int nlanes = output->dev->lanes;
int mode_clock = (mode_valid_check ? mode->clock : mode->crtc_clock);
+ unsigned long req_hs_clk_rate;
int ret;
ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check);
@@ -596,10 +597,20 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi,
if (ret)
return ret;
+ req_hs_clk_rate = output->phy_opts.mipi_dphy.hs_clk_rate;
ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts);
if (ret)
return ret;
+ if (req_hs_clk_rate != output->phy_opts.mipi_dphy.hs_clk_rate) {
+ dev_err(&dsi->dphy->dev,
+ "validation changed hs_clk_rate from %lu to %lu, diff %lu\n",
+ req_hs_clk_rate, output->phy_opts.mipi_dphy.hs_clk_rate,
+ output->phy_opts.mipi_dphy.hs_clk_rate -
+ req_hs_clk_rate);
+ return -EINVAL;
+ }
+
dsi_hss_hsa_hse_hbp = dsi_cfg->hbp + DSI_HBP_FRAME_OVERHEAD;
if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
dsi_hss_hsa_hse_hbp += dsi_cfg->hsa + DSI_HSA_FRAME_OVERHEAD;
The phy_validate() can change the HS clock rate we passed to it in the PHY config, depending on what the HW can actually do. The driver just ignores this at the moment, but if the actual HS clock rate is different than the requested one, the pipeline will fail as all the DSI timing calculations will be incorrect. There are ways to improve DSI operation for various clock rates, but for now, just add a check to see if the rate changed, and return an error if that happens. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 11 +++++++++++ 1 file changed, 11 insertions(+)