| Message ID | 20250324103332.159682-1-andyshrk@163.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] dt-bindings: display: rockchip, inno-hdmi: Fix ref clk Document of RK3036 compatible | expand |
On Mon, 24 Mar 2025 18:33:27 +0800, Andy Yan wrote: > From: Andy Yan <andy.yan@rock-chips.com> > > The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled > first before normal DDC communication can be carried out. > > Therefore, both RK3036 and RK3128 HDMI require two identical clocks. > > Signed-off-by: Andy Yan <andy.yan@rock-chips.com> > --- > > .../bindings/display/rockchip/rockchip,inno-hdmi.yaml | 11 ++--------- > 1 file changed, 2 insertions(+), 9 deletions(-) > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml index 5b87b0f1963e1..9d1e7f894ea54 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml @@ -23,13 +23,11 @@ properties: maxItems: 1 clocks: - minItems: 1 items: - description: The HDMI controller main clock - description: The HDMI PHY reference clock clock-names: - minItems: 1 items: - const: pclk - const: ref @@ -87,11 +85,6 @@ allOf: const: rockchip,rk3128-inno-hdmi then: - properties: - clocks: - minItems: 2 - clock-names: - minItems: 2 required: - power-domains @@ -106,8 +99,8 @@ examples: compatible = "rockchip,rk3036-inno-hdmi"; reg = <0x20034000 0x4000>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_HDMI>; - clock-names = "pclk"; + clocks = <&cru PCLK_HDMI>, <&cru SCLK_LCDC>; + clock-names = "pclk", "ref"; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; #sound-dai-cells = <0>;