diff mbox series

[v2,3/6] drm/i915/gt: Remove FIRST_RENDER_COMPUTE in workaround

Message ID 20250326234005.1574688-4-andi.shyti@linux.intel.com (mailing list archive)
State New
Headers show
Series Remove I915_ENGINE_FIRST_RENDER_COMPUTE | expand

Commit Message

Andi Shyti March 26, 2025, 11:40 p.m. UTC 
From: Andi Shyti <andi.shyti@intel.com>

All platforms supported by i915 have at least one RCS engine,
so there's no need to explicitly check for RCS or CCS presence.

Remove the redundant check and move the associated functions
to a more appropriate location in the code.

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index bedd88a15959..b8ea6505afa2 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2894,20 +2894,14 @@  engine_init_workarounds(struct intel_engine_cs *engine, struct i915_wa_list *wal
 
 	engine_fake_wa_init(engine, wal);
 
-	/*
-	 * These are common workarounds that just need to applied
-	 * to a single RCS/CCS engine's workaround list since
-	 * they're reset as part of the general render domain reset.
-	 */
-	if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
+	if (engine->class == RENDER_CLASS) {
 		general_render_compute_wa_init(engine, wal);
-
-	if (engine->class == COMPUTE_CLASS)
-		ccs_engine_wa_init(engine, wal);
-	else if (engine->class == RENDER_CLASS)
 		rcs_engine_wa_init(engine, wal);
-	else
+	} else if (engine->class == COMPUTE_CLASS) {
+		ccs_engine_wa_init(engine, wal);
+	} else {
 		xcs_engine_wa_init(engine, wal);
+	}
 }
 
 void intel_engine_init_workarounds(struct intel_engine_cs *engine)