diff mbox series

[v14,1/9] drm/ingenic: Add support for JZ4780 and HDMI output

Message ID 31eff2819f94fefcb01aa5cb23c79ccf302d9238.1644675566.git.hns@goldelico.com (mailing list archive)
State New, archived
Headers show
Series MIPS: JZ4780 and CI20 HDMI | expand

Commit Message

H. Nikolaus Schaller Feb. 12, 2022, 2:19 p.m. UTC 
From: Paul Boddie <paul@boddie.org.uk>

Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.

Note that plane f0 is not working and disabled to be
seen from user-space.

Tested on MIPS Creator CI20 board.

Signed-off-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Comments

Paul Cercueil Feb. 12, 2022, 2:44 p.m. UTC | #1 
Hi Nikolaus,

Le sam., févr. 12 2022 at 15:19:19 +0100, H. Nikolaus Schaller 
<hns@goldelico.com> a écrit :
> From: Paul Boddie <paul@boddie.org.uk>
> 
> Add support for the LCD controller present on JZ4780 SoCs.
> This SoC uses 8-byte descriptors which extend the current
> 4-byte descriptors used for other Ingenic SoCs.
> 
> Note that plane f0 is not working and disabled to be
> seen from user-space.
> 
> Tested on MIPS Creator CI20 board.

That's not really what the patch does though. It's a fix for a commit 
that has the exact same title and description, and is already merged: 
b807fd2c43fe ("drm/ingenic: Add support for JZ4780 and HDMI output").

Please rewrite the patch's title and description to actually describe 
its purpose.

Cheers,
-Paul

> 
> Signed-off-by: Paul Boddie <paul@boddie.org.uk>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> index 7f10d6eed549d..dcf44cb00821f 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> @@ -65,8 +65,10 @@ struct ingenic_dma_hwdescs {
>  struct jz_soc_info {
>  	bool needs_dev_clk;
>  	bool has_osd;
> +	bool has_alpha;
>  	bool map_noncoherent;
>  	bool use_extended_hwdesc;
> +	bool plane_f0_not_working;
>  	unsigned int max_width, max_height;
>  	const u32 *formats_f0, *formats_f1;
>  	unsigned int num_formats_f0, num_formats_f1;
> @@ -453,7 +455,7 @@ static int ingenic_drm_plane_atomic_check(struct 
> drm_plane *plane,
>  	if (!crtc)
>  		return 0;
> 
> -	if (plane == &priv->f0)
> +	if (priv->soc_info->plane_f0_not_working && plane == &priv->f0)
>  		return -EINVAL;
> 
>  	crtc_state = drm_atomic_get_existing_crtc_state(state,
> @@ -1055,6 +1057,7 @@ static int ingenic_drm_bind(struct device *dev, 
> bool has_components)
>  	long parent_rate;
>  	unsigned int i, clone_mask = 0;
>  	int ret, irq;
> +	u32 osdc = 0;
> 
>  	soc_info = of_device_get_match_data(dev);
>  	if (!soc_info) {
> @@ -1312,7 +1315,10 @@ static int ingenic_drm_bind(struct device 
> *dev, bool has_components)
> 
>  	/* Enable OSD if available */
>  	if (soc_info->has_osd)
> -		regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
> +		osdc |= JZ_LCD_OSDC_OSDEN;
> +	if (soc_info->has_alpha)
> +		osdc |= JZ_LCD_OSDC_ALPHAEN;
> +	regmap_write(priv->map, JZ_REG_LCD_OSDC, osdc);
> 
>  	mutex_init(&priv->clk_mutex);
>  	priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;
> @@ -1511,7 +1517,9 @@ static const struct jz_soc_info jz4770_soc_info 
> = {
>  static const struct jz_soc_info jz4780_soc_info = {
>  	.needs_dev_clk = true,
>  	.has_osd = true,
> +	.has_alpha = true,
>  	.use_extended_hwdesc = true,
> +	.plane_f0_not_working = true,	/* REVISIT */
>  	.max_width = 4096,
>  	.max_height = 2048,
>  	.formats_f1 = jz4770_formats_f1,
> --
> 2.33.0
>
H. Nikolaus Schaller Feb. 12, 2022, 3:49 p.m. UTC | #2 
Hi Paul,

> Am 12.02.2022 um 15:44 schrieb Paul Cercueil <paul@crapouillou.net>:
> 
> Hi Nikolaus,
> 
> Le sam., févr. 12 2022 at 15:19:19 +0100, H. Nikolaus Schaller <hns@goldelico.com> a écrit :
>> From: Paul Boddie <paul@boddie.org.uk>
>> Add support for the LCD controller present on JZ4780 SoCs.
>> This SoC uses 8-byte descriptors which extend the current
>> 4-byte descriptors used for other Ingenic SoCs.
>> Note that plane f0 is not working and disabled to be
>> seen from user-space.
>> Tested on MIPS Creator CI20 board.
> 
> That's not really what the patch does though. It's a fix for a commit that has the exact same title and description, and is already merged: b807fd2c43fe ("drm/ingenic: Add support for JZ4780 and HDMI output").

Well, last version was not a fix...

I simply did not notice that parts of the commit contents were removed by rebase to drm-misc-next and the commit message diverged...

> Please rewrite the patch's title and description to actually describe its purpose.

Well, git rebase should do this for us if it removes the code described in the commit and makes a fix out of it. What do we have automation for :)

v15 will come now...

BR and thanks,
Nikolaus

> 
> Cheers,
> -Paul
> 
>> Signed-off-by: Paul Boddie <paul@boddie.org.uk>
>> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>> ---
>> drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12 ++++++++++--
>> 1 file changed, 10 insertions(+), 2 deletions(-)
>> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> index 7f10d6eed549d..dcf44cb00821f 100644
>> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> @@ -65,8 +65,10 @@ struct ingenic_dma_hwdescs {
>> struct jz_soc_info {
>> 	bool needs_dev_clk;
>> 	bool has_osd;
>> +	bool has_alpha;
>> 	bool map_noncoherent;
>> 	bool use_extended_hwdesc;
>> +	bool plane_f0_not_working;
>> 	unsigned int max_width, max_height;
>> 	const u32 *formats_f0, *formats_f1;
>> 	unsigned int num_formats_f0, num_formats_f1;
>> @@ -453,7 +455,7 @@ static int ingenic_drm_plane_atomic_check(struct drm_plane *plane,
>> 	if (!crtc)
>> 		return 0;
>> -	if (plane == &priv->f0)
>> +	if (priv->soc_info->plane_f0_not_working && plane == &priv->f0)
>> 		return -EINVAL;
>> 	crtc_state = drm_atomic_get_existing_crtc_state(state,
>> @@ -1055,6 +1057,7 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
>> 	long parent_rate;
>> 	unsigned int i, clone_mask = 0;
>> 	int ret, irq;
>> +	u32 osdc = 0;
>> 	soc_info = of_device_get_match_data(dev);
>> 	if (!soc_info) {
>> @@ -1312,7 +1315,10 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
>> 	/* Enable OSD if available */
>> 	if (soc_info->has_osd)
>> -		regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
>> +		osdc |= JZ_LCD_OSDC_OSDEN;
>> +	if (soc_info->has_alpha)
>> +		osdc |= JZ_LCD_OSDC_ALPHAEN;
>> +	regmap_write(priv->map, JZ_REG_LCD_OSDC, osdc);
>> 	mutex_init(&priv->clk_mutex);
>> 	priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;
>> @@ -1511,7 +1517,9 @@ static const struct jz_soc_info jz4770_soc_info = {
>> static const struct jz_soc_info jz4780_soc_info = {
>> 	.needs_dev_clk = true,
>> 	.has_osd = true,
>> +	.has_alpha = true,
>> 	.use_extended_hwdesc = true,
>> +	.plane_f0_not_working = true,	/* REVISIT */
>> 	.max_width = 4096,
>> 	.max_height = 2048,
>> 	.formats_f1 = jz4770_formats_f1,
>> --
>> 2.33.0
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 7f10d6eed549d..dcf44cb00821f 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -65,8 +65,10 @@  struct ingenic_dma_hwdescs {
 struct jz_soc_info {
 	bool needs_dev_clk;
 	bool has_osd;
+	bool has_alpha;
 	bool map_noncoherent;
 	bool use_extended_hwdesc;
+	bool plane_f0_not_working;
 	unsigned int max_width, max_height;
 	const u32 *formats_f0, *formats_f1;
 	unsigned int num_formats_f0, num_formats_f1;
@@ -453,7 +455,7 @@  static int ingenic_drm_plane_atomic_check(struct drm_plane *plane,
 	if (!crtc)
 		return 0;
 
-	if (plane == &priv->f0)
+	if (priv->soc_info->plane_f0_not_working && plane == &priv->f0)
 		return -EINVAL;
 
 	crtc_state = drm_atomic_get_existing_crtc_state(state,
@@ -1055,6 +1057,7 @@  static int ingenic_drm_bind(struct device *dev, bool has_components)
 	long parent_rate;
 	unsigned int i, clone_mask = 0;
 	int ret, irq;
+	u32 osdc = 0;
 
 	soc_info = of_device_get_match_data(dev);
 	if (!soc_info) {
@@ -1312,7 +1315,10 @@  static int ingenic_drm_bind(struct device *dev, bool has_components)
 
 	/* Enable OSD if available */
 	if (soc_info->has_osd)
-		regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
+		osdc |= JZ_LCD_OSDC_OSDEN;
+	if (soc_info->has_alpha)
+		osdc |= JZ_LCD_OSDC_ALPHAEN;
+	regmap_write(priv->map, JZ_REG_LCD_OSDC, osdc);
 
 	mutex_init(&priv->clk_mutex);
 	priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;
@@ -1511,7 +1517,9 @@  static const struct jz_soc_info jz4770_soc_info = {
 static const struct jz_soc_info jz4780_soc_info = {
 	.needs_dev_clk = true,
 	.has_osd = true,
+	.has_alpha = true,
 	.use_extended_hwdesc = true,
+	.plane_f0_not_working = true,	/* REVISIT */
 	.max_width = 4096,
 	.max_height = 2048,
 	.formats_f1 = jz4770_formats_f1,