From patchwork Mon Apr 1 08:56:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 10879421 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 475D9139A for ; Mon, 1 Apr 2019 08:57:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 329052854F for ; Mon, 1 Apr 2019 08:57:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 26E212867C; Mon, 1 Apr 2019 08:57:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D13382854F for ; Mon, 1 Apr 2019 08:57:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA6616E64F; Mon, 1 Apr 2019 08:57:02 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [217.70.178.230]) by gabe.freedesktop.org (Postfix) with ESMTPS id B79D76E64F for ; Mon, 1 Apr 2019 08:57:00 +0000 (UTC) Received: from localhost (aaubervilliers-681-1-91-136.w90-88.abo.wanadoo.fr [90.88.32.136]) (Authenticated sender: maxime.ripard@bootlin.com) by relay10.mail.gandi.net (Postfix) with ESMTPSA id 283FA240013; Mon, 1 Apr 2019 08:56:55 +0000 (UTC) From: Maxime Ripard To: Mark Rutland , Rob Herring , Frank Rowand , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v5 2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller Date: Mon, 1 Apr 2019 10:56:42 +0200 Message-Id: <34fd9f63f33911cc4b2f703a8927289b5cadfb94.1554108995.git-series.maxime.ripard@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Thomas Petazzoni , Arnd Bergmann , dri-devel@lists.freedesktop.org, Georgi Djakov , Paul Kocialkowski , Yong Deng , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The MBUS controller drives the MBUS that other devices in the SoC will use to perform DMA. It also has a register interface that allows to monitor and control the bandwidth and priorities for masters on that bus. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | 36 +++++++- 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt diff --git a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt new file mode 100644 index 000000000000..1464a4713553 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt @@ -0,0 +1,36 @@ +Allwinner Memory Bus (MBUS) controller + +The MBUS controller drives the MBUS that other devices in the SoC will +use to perform DMA. It also has a register interface that allows to +monitor and control the bandwidth and priorities for masters on that +bus. + +Required properties: + - compatible: Must be one of: + - allwinner,sun5i-a13-mbus + - reg: Offset and length of the register set for the controller + - clocks: phandle to the clock driving the controller + - dma-ranges: See section 2.3.9 of the DeviceTree Specification + - #interconnect-cells: Must be one, with the argument being the MBUS + port ID + +Each device having to perform their DMA through the MBUS must have the +interconnects and interconnect-names properties set to the MBUS +controller and with "dma-mem" as the interconnect name. + +Example: + +mbus: dram-controller@1c01000 { + compatible = "allwinner,sun5i-a13-mbus"; + reg = <0x01c01000 0x1000>; + clocks = <&ccu CLK_MBUS>; + dma-ranges = <0x00000000 0x40000000 0x20000000>; + #interconnect-cells = <1>; +}; + +fe0: display-frontend@1e00000 { + compatible = "allwinner,sun5i-a13-display-frontend"; + ... + interconnects = <&mbus 19>; + interconnect-names = "dma-mem"; +};