@@ -199,6 +199,7 @@ u32 intel_panel_get_backlight(struct drm_device *dev)
val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
} else {
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
+ DRM_DEBUG_DRIVER("get backlight val = %d\n", val);
if (IS_PINEVIEW(dev))
val >>= 1;
@@ -236,17 +237,22 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level)
u32 max = intel_panel_get_max_backlight(dev);
u8 lbpc;
+ DRM_DEBUG_DRIVER("set backlight max = %d\n", max);
lbpc = level * 0xfe / max + 1;
+ DRM_DEBUG_DRIVER("set backlight lbpc = %d\n", lbpc);
level /= lbpc;
pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
}
tmp = I915_READ(BLC_PWM_CTL);
+ DRM_DEBUG_DRIVER("set backlight tmp(1) = %d\n", tmp);
if (IS_PINEVIEW(dev)) {
tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
level <<= 1;
} else
tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
+ DRM_DEBUG_DRIVER("set backlight tmp(2) = %d\n", tmp);
+ DRM_DEBUG_DRIVER("set backlight level = %d\n", level);
I915_WRITE(BLC_PWM_CTL, tmp | level);
}