diff mbox series

[04/15] drm/dp_mst: Add PBN calculation for DSC modes

Message ID 5f2d4764a4fee659d69e625618eded34a7dbe312.1568833906.git.mikita.lipski@amd.com (mailing list archive)
State New, archived
Headers show
Series DSC MST support for AMDGPU | expand

Commit Message

Lipski, Mikita Sept. 18, 2019, 8:26 p.m. UTC
From: David Francis <David.Francis@amd.com>

With DSC, bpp can be fractional in multiples of 1/16.

Change drm_dp_calc_pbn_mode to reflect this, adding a new
parameter bool dsc. When this parameter is true, treat the
bpp parameter as having units not of bits per pixel, but
1/16 of a bit per pixel

v2: Don't add separate function for this

Change-Id: I33ef6f53c44dc32aa869aa9741ba0339aaf5e54f
Cc: amd-gfx@lists.freedesktop.org
Cc: nouveau@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c    |  8 +++++++-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c    |  2 +-
 drivers/gpu/drm/drm_dp_mst_topology.c            | 16 ++++++++++++----
 drivers/gpu/drm/i915/intel_dp_mst.c              |  3 ++-
 drivers/gpu/drm/nouveau/dispnv50/disp.c          |  3 ++-
 drivers/gpu/drm/radeon/radeon_dp_mst.c           |  2 +-
 include/drm/drm_dp_mst_helper.h                  |  3 +--
 7 files changed, 26 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 39c239a08633..1130298c6930 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4482,7 +4482,13 @@  static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder,
 
 	bpp *= 3;
 	clock = adjusted_mode->clock;
-	pbn = drm_dp_calc_pbn_mode(clock, bpp);
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+	if (aconnector->dc_sink &&
+	    aconnector->dc_sink->sink_dsc_caps.dsc_dec_caps.is_dsc_supported)
+		pbn = drm_dp_calc_pbn_mode(clock, bpp, true);
+	else
+#endif
+		pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 	slots = drm_dp_atomic_find_vcpi_slots(state,
 						mst_mgr,
 						mst_port,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 555af4a8c0ef..b151a5a51a94 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -235,7 +235,7 @@  bool dm_helpers_dp_mst_write_payload_allocation_table(
 
 		/* TODO need to know link rate */
 
-		pbn = drm_dp_calc_pbn_mode(clock, bpp);
+		pbn = drm_dp_calc_pbn_mode(clock, bpp, false);
 
 		slots = drm_dp_find_vcpi_slots(mst_mgr, pbn);
 		ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port, pbn, slots);
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index 398e7314ea8b..659099366f8b 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3531,10 +3531,11 @@  EXPORT_SYMBOL(drm_dp_check_act_status);
  * drm_dp_calc_pbn_mode() - Calculate the PBN for a mode.
  * @clock: dot clock for the mode
  * @bpp: bpp for the mode.
+ * @dsc: DSC mode. If true, bpp has units of 1/16 of a bit per pixel
  *
  * This uses the formula in the spec to calculate the PBN value for a mode.
  */
-int drm_dp_calc_pbn_mode(int clock, int bpp)
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc)
 {
 	u64 kbps;
 	s64 peak_kbps;
@@ -3552,11 +3553,18 @@  int drm_dp_calc_pbn_mode(int clock, int bpp)
 	 * peak_kbps *= (1006/1000)
 	 * peak_kbps *= (64/54)
 	 * peak_kbps *= 8    convert to bytes
+	 *
+	 * If the bpp is in units of 1/16, further divide by 16. Put this
+	 * factor in the numerator rather than the denominator to avoid
+	 * integer overflow
 	 */
 
 	numerator = 64 * 1006;
 	denominator = 54 * 8 * 1000 * 1000;
 
+	if (dsc)
+		numerator /= 16;
+
 	kbps *= numerator;
 	peak_kbps = drm_fixp_from_fraction(kbps, denominator);
 
@@ -3567,19 +3575,19 @@  EXPORT_SYMBOL(drm_dp_calc_pbn_mode);
 static int test_calc_pbn_mode(void)
 {
 	int ret;
-	ret = drm_dp_calc_pbn_mode(154000, 30);
+	ret = drm_dp_calc_pbn_mode(154000, 30, false);
 	if (ret != 689) {
 		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
 				154000, 30, 689, ret);
 		return -EINVAL;
 	}
-	ret = drm_dp_calc_pbn_mode(234000, 30);
+	ret = drm_dp_calc_pbn_mode(234000, 30, false);
 	if (ret != 1047) {
 		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
 				234000, 30, 1047, ret);
 		return -EINVAL;
 	}
-	ret = drm_dp_calc_pbn_mode(297000, 24);
+	ret = drm_dp_calc_pbn_mode(297000, 24, false);
 	if (ret != 1063) {
 		DRM_ERROR("PBN calculation test failed - clock %d, bpp %d, expected PBN %d, actual PBN %d.\n",
 				297000, 24, 1063, ret);
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index 8839eaea8371..2a692c2141bf 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -58,7 +58,8 @@  static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
 		crtc_state->pipe_bpp = bpp;
 
 		crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
-						       crtc_state->pipe_bpp);
+						       crtc_state->pipe_bpp,
+						       false);
 
 		slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
 						      port, crtc_state->pbn);
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 4b1650f51955..ec8bb491e576 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -773,7 +773,8 @@  nv50_msto_atomic_check(struct drm_encoder *encoder,
 	if (!state->duplicated)
 		asyh->dp.pbn =
 			drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,
-					     connector->display_info.bpc * 3);
+					     connector->display_info.bpc * 3,
+					     false);
 
 	if (drm_atomic_crtc_needs_modeset(crtc_state)) {
 		slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index 8d85540bbb43..384d0c9373c4 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -513,7 +513,7 @@  static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 
 	mst_enc = radeon_encoder->enc_priv;
 
-	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
+	mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false);
 
 	mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 	DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 2ba6253ea6d3..9116b2c95239 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -610,8 +610,7 @@  bool drm_dp_mst_port_has_audio(struct drm_dp_mst_topology_mgr *mgr,
 struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
 
 
-int drm_dp_calc_pbn_mode(int clock, int bpp);
-
+int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
 
 bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr,
 			      struct drm_dp_mst_port *port, int pbn, int slots);