From patchwork Fri Mar 24 14:47:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 9643003 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A0DF260327 for ; Fri, 24 Mar 2017 14:48:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94E5022376 for ; Fri, 24 Mar 2017 14:48:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 89D6522701; Fri, 24 Mar 2017 14:48:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 48C5E22376 for ; Fri, 24 Mar 2017 14:48:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B72D16EC20; Fri, 24 Mar 2017 14:48:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2DEE06EC20 for ; Fri, 24 Mar 2017 14:48:37 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2OEmEHl030944; Fri, 24 Mar 2017 09:48:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1490366894; bh=Yz6XrHLnCk9jNyh+bXYK2RWpiUNmhYBRyrl0CLgGRA4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VXYcBhUqAWIJnnFS/fxmu4+gJ1wnid5mUaIk9P8ap1N6i0gvRCE2WY+tTi5I3NPFe NAhRCmpsbOq6S8lLL88tvJ7ZF/9WVrkIEuFlAo9WYYy+66XhfdAG82S1/DSZabJmxT eJeT96hWihSAblTUoSmzlQAGETbkIYYTYfHEnspY= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2OEm9FA030415; Fri, 24 Mar 2017 09:48:09 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Fri, 24 Mar 2017 09:48:09 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2OElxnp022185; Fri, 24 Mar 2017 09:48:08 -0500 From: Jyri Sarha To: Subject: [PATCH v4 6/6] drm/omap: Implement CTM property for CRTC using OVL managers CPR matrix Date: Fri, 24 Mar 2017 16:47:56 +0200 Message-ID: <69b5cdde2a82563e29ae8d8b2a5af714418ea633.1490366823.git.jsarha@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: MIME-Version: 1.0 Cc: tomi.valkeinen@ti.com, laurent.pinchart@ideasonboard.com, Jyri Sarha X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Implement CTM color management property for OMAP CRTC using DSS overlay manager's Color Phase Rotation matrix. The CPR matrix does not exactly match the CTM property documentation. On DSS the CPR matrix is applied before gamma table look up. However, it seems stupid to add a custom property just for that. Signed-off-by: Jyri Sarha --- drivers/gpu/drm/omapdrm/omap_crtc.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index 026f73b..ed3b631 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -312,6 +312,25 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) DBG("%s: apply done", omap_crtc->name); } +static s16 omap_crtc_s32_32_to_s2_8(s64 coef) +{ + return (s16)(coef >> 24); +} + +static void omap_crtc_cpr_coefs_from_ctm(const struct drm_color_ctm *ctm, + struct omap_dss_cpr_coefs *cpr) +{ + cpr->rr = omap_crtc_s32_32_to_s2_8(ctm->matrix[0]); + cpr->rg = omap_crtc_s32_32_to_s2_8(ctm->matrix[1]); + cpr->rb = omap_crtc_s32_32_to_s2_8(ctm->matrix[2]); + cpr->gr = omap_crtc_s32_32_to_s2_8(ctm->matrix[3]); + cpr->gg = omap_crtc_s32_32_to_s2_8(ctm->matrix[4]); + cpr->gb = omap_crtc_s32_32_to_s2_8(ctm->matrix[5]); + cpr->br = omap_crtc_s32_32_to_s2_8(ctm->matrix[6]); + cpr->bg = omap_crtc_s32_32_to_s2_8(ctm->matrix[7]); + cpr->bb = omap_crtc_s32_32_to_s2_8(ctm->matrix[8]); +} + static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) { struct omap_drm_private *priv = crtc->dev->dev_private; @@ -325,6 +344,15 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) info.partial_alpha_enabled = false; info.cpr_enable = false; + if (crtc->state->ctm && !WARN_ON(crtc->state->ctm->length != + sizeof(struct drm_color_ctm))) { + struct drm_color_ctm *ctm = + (struct drm_color_ctm *) crtc->state->ctm->data; + + info.cpr_enable = true; + omap_crtc_cpr_coefs_from_ctm(ctm, &info.cpr_coefs); + } + priv->dispc_ops->mgr_setup(omap_crtc->channel, &info); } @@ -624,7 +652,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, if (priv->dispc_ops->mgr_gamma_size(channel)) { uint gamma_lut_size = 256; - drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); + drm_crtc_enable_color_mgmt(crtc, 0, true, gamma_lut_size); drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); }