From patchwork Wed May 17 05:26:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 9730053 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CE609602DB for ; Wed, 17 May 2017 05:26:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD398269E2 for ; Wed, 17 May 2017 05:26:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AFC5C28485; Wed, 17 May 2017 05:26:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E34CC269E2 for ; Wed, 17 May 2017 05:26:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 40CFA6E038; Wed, 17 May 2017 05:26:31 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 017A96E038 for ; Wed, 17 May 2017 05:26:29 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CA01760DA8; Wed, 17 May 2017 05:26:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1494998789; bh=/+GT5c4OSDc0MnQ6HLuSPK/7sA35/0ZRdmiNy33hCcQ=; h=Subject:To:References:Cc:From:Date:In-Reply-To:From; b=jjMor/lc+/fztQFQgNBuVTjFzoJiL9xOSIdeydw5TKL4EAgb57EECWDNlZfoidJnd EmOIY90ZdlWm5Nz9OQVtdQNN8KXwPKUGJvCS8RAkGm0CHcJ8AZNC5hEaRUOFfLT9vY RWAQLfk4uAvLcoq3whI3MAufVXeoTThYRIbahpRg= Received: from [10.79.40.55] (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 06EA760779; Wed, 17 May 2017 05:26:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1494998789; bh=/+GT5c4OSDc0MnQ6HLuSPK/7sA35/0ZRdmiNy33hCcQ=; h=Subject:To:References:Cc:From:Date:In-Reply-To:From; b=jjMor/lc+/fztQFQgNBuVTjFzoJiL9xOSIdeydw5TKL4EAgb57EECWDNlZfoidJnd EmOIY90ZdlWm5Nz9OQVtdQNN8KXwPKUGJvCS8RAkGm0CHcJ8AZNC5hEaRUOFfLT9vY RWAQLfk4uAvLcoq3whI3MAufVXeoTThYRIbahpRg= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 06EA760779 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=architt@codeaurora.org Subject: Re: [RFC v3 5/8] drm/msm: update cursors asynchronously through atomic To: Gustavo Padovan , dri-devel@lists.freedesktop.org References: <20170512191054.10074-1-gustavo@padovan.org> <20170512191054.10074-6-gustavo@padovan.org> <99acad61-8906-adb1-bcb4-a704dbed833c@codeaurora.org> From: Archit Taneja Message-ID: <9ba97677-adbb-6589-cdf6-0619f86e0dd2@codeaurora.org> Date: Wed, 17 May 2017 10:56:25 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <99acad61-8906-adb1-bcb4-a704dbed833c@codeaurora.org> Cc: Gustavo Padovan X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hi, On 05/16/2017 08:14 PM, Archit Taneja wrote: > > > On 5/13/2017 12:40 AM, Gustavo Padovan wrote: >> From: Gustavo Padovan >> >> Add support to async updates of cursors by using the new atomic >> interface for that. Basically what this commit does is do what >> mdp5_update_cursor_plane_legacy() did but through atomic. > > Works well on DB820c (which has a APQ8096 SoC). > > Tested-by: Archit Taneja Actually, after some more thorough testing, I found one issue, mentioned below. > >> >> v3: move size checks back to drivers (Ville Syrjälä) >> >> v2: move fb setting to core and use new state (Eric Anholt) >> >> Cc: Rob Clark >> Signed-off-by: Gustavo Padovan >> --- >> drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 151 +++++++++++++----------------- >> 1 file changed, 63 insertions(+), 88 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c >> index a38c5fe..07106c1 100644 >> --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c >> +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c >> @@ -33,15 +33,6 @@ static int mdp5_plane_mode_set(struct drm_plane *plane, >> struct drm_crtc *crtc, struct drm_framebuffer *fb, >> struct drm_rect *src, struct drm_rect *dest); >> -static int mdp5_update_cursor_plane_legacy(struct drm_plane *plane, >> - struct drm_crtc *crtc, >> - struct drm_framebuffer *fb, >> - int crtc_x, int crtc_y, >> - unsigned int crtc_w, unsigned int crtc_h, >> - uint32_t src_x, uint32_t src_y, >> - uint32_t src_w, uint32_t src_h, >> - struct drm_modeset_acquire_ctx *ctx); >> - >> static struct mdp5_kms *get_kms(struct drm_plane *plane) >> { >> struct msm_drm_private *priv = plane->dev->dev_private; >> @@ -257,7 +248,7 @@ static const struct drm_plane_funcs mdp5_plane_funcs = { >> }; >> static const struct drm_plane_funcs mdp5_cursor_plane_funcs = { >> - .update_plane = mdp5_update_cursor_plane_legacy, >> + .update_plane = drm_atomic_helper_update_plane, >> .disable_plane = drm_atomic_helper_disable_plane, >> .destroy = mdp5_plane_destroy, >> .set_property = drm_atomic_helper_plane_set_property, >> @@ -484,11 +475,73 @@ static void mdp5_plane_atomic_update(struct drm_plane *plane, >> } >> } >> +static int mdp5_plane_atomic_async_check(struct drm_plane *plane, >> + struct drm_plane_state *state) >> +{ >> + struct mdp5_plane_state *mdp5_state = to_mdp5_plane_state(state); >> + struct drm_crtc_state *crtc_state; >> + >> + crtc_state = drm_atomic_get_existing_crtc_state(state->state, >> + state->crtc); I see a kernel splat here (a NULL pointer dereference). The async_check function assumes that there is always going to be a plane_state->crtc available. This doesn't seem to be the case at least in the drm_atomic_helper_disable_plane() path. Moving the check to set legacy_cursor_update after calling __drm_atomic_helper_disable_plane() seems to fix the issue. Do you think it's a legit fix? One more point w.r.t msm driver is that we don't use the default drm_atomic_helper_commit() for our atomic_commit op. So I had to call drm_atomic_helper_async_commit() from our atomic_commit implementation (i.e, in msm_atomic_commit in drivers/gpu/drm/msm/msm_atomic.c) Thanks, Archit >> + if (WARN_ON(!crtc_state)) >> + return -EINVAL; >> + >> + if (!crtc_state->active) >> + return -EINVAL; >> + >> + mdp5_state = to_mdp5_plane_state(state); >> + >> + /* don't use fast path if we don't have a hwpipe allocated yet */ >> + if (!mdp5_state->hwpipe) >> + return -EINVAL; >> + >> + /* only allow changing of position(crtc x/y or src x/y) in fast path */ >> + if (plane->state->crtc != state->crtc || >> + plane->state->src_w != state->src_w || >> + plane->state->src_h != state->src_h || >> + plane->state->crtc_w != state->crtc_w || >> + plane->state->crtc_h != state->crtc_h || >> + !plane->state->fb || >> + plane->state->fb != state->fb) >> + return -EINVAL; >> + >> + return 0; >> +} >> + >> +static void mdp5_plane_atomic_async_update(struct drm_plane *plane, >> + struct drm_plane_state *new_state) >> +{ >> + plane->state->src_x = new_state->src_x; >> + plane->state->src_y = new_state->src_y; >> + plane->state->crtc_x = new_state->crtc_x; >> + plane->state->crtc_y = new_state->crtc_y; >> + >> + if (plane_enabled(new_state)) { >> + struct mdp5_ctl *ctl; >> + struct mdp5_pipeline *pipeline = >> + mdp5_crtc_get_pipeline(plane->crtc); >> + int ret; >> + >> + ret = mdp5_plane_mode_set(plane, new_state->crtc, new_state->fb, >> + &new_state->src, &new_state->dst); >> + WARN_ON(ret < 0); >> + >> + ctl = mdp5_crtc_get_ctl(new_state->crtc); >> + >> + mdp5_ctl_commit(ctl, pipeline, mdp5_plane_get_flush(plane)); >> + } >> + >> + *to_mdp5_plane_state(plane->state) = >> + *to_mdp5_plane_state(new_state); >> +} >> + >> static const struct drm_plane_helper_funcs mdp5_plane_helper_funcs = { >> .prepare_fb = mdp5_plane_prepare_fb, >> .cleanup_fb = mdp5_plane_cleanup_fb, >> .atomic_check = mdp5_plane_atomic_check, >> .atomic_update = mdp5_plane_atomic_update, >> + .atomic_async_check = mdp5_plane_atomic_async_check, >> + .atomic_async_update = mdp5_plane_atomic_async_update, >> }; >> static void set_scanout_locked(struct mdp5_kms *mdp5_kms, >> @@ -997,84 +1050,6 @@ static int mdp5_plane_mode_set(struct drm_plane *plane, >> return ret; >> } >> -static int mdp5_update_cursor_plane_legacy(struct drm_plane *plane, >> - struct drm_crtc *crtc, struct drm_framebuffer *fb, >> - int crtc_x, int crtc_y, >> - unsigned int crtc_w, unsigned int crtc_h, >> - uint32_t src_x, uint32_t src_y, >> - uint32_t src_w, uint32_t src_h, >> - struct drm_modeset_acquire_ctx *ctx) >> -{ >> - struct drm_plane_state *plane_state, *new_plane_state; >> - struct mdp5_plane_state *mdp5_pstate; >> - struct drm_crtc_state *crtc_state = crtc->state; >> - int ret; >> - >> - if (!crtc_state->active || drm_atomic_crtc_needs_modeset(crtc_state)) >> - goto slow; >> - >> - plane_state = plane->state; >> - mdp5_pstate = to_mdp5_plane_state(plane_state); >> - >> - /* don't use fast path if we don't have a hwpipe allocated yet */ >> - if (!mdp5_pstate->hwpipe) >> - goto slow; >> - >> - /* only allow changing of position(crtc x/y or src x/y) in fast path */ >> - if (plane_state->crtc != crtc || >> - plane_state->src_w != src_w || >> - plane_state->src_h != src_h || >> - plane_state->crtc_w != crtc_w || >> - plane_state->crtc_h != crtc_h || >> - !plane_state->fb || >> - plane_state->fb != fb) >> - goto slow; >> - >> - new_plane_state = mdp5_plane_duplicate_state(plane); >> - if (!new_plane_state) >> - return -ENOMEM; >> - >> - new_plane_state->src_x = src_x; >> - new_plane_state->src_y = src_y; >> - new_plane_state->src_w = src_w; >> - new_plane_state->src_h = src_h; >> - new_plane_state->crtc_x = crtc_x; >> - new_plane_state->crtc_y = crtc_y; >> - new_plane_state->crtc_w = crtc_w; >> - new_plane_state->crtc_h = crtc_h; >> - >> - ret = mdp5_plane_atomic_check_with_state(crtc_state, new_plane_state); >> - if (ret) >> - goto slow_free; >> - >> - if (new_plane_state->visible) { >> - struct mdp5_ctl *ctl; >> - struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(crtc); >> - >> - ret = mdp5_plane_mode_set(plane, crtc, fb, >> - &new_plane_state->src, >> - &new_plane_state->dst); >> - WARN_ON(ret < 0); >> - >> - ctl = mdp5_crtc_get_ctl(crtc); >> - >> - mdp5_ctl_commit(ctl, pipeline, mdp5_plane_get_flush(plane)); >> - } >> - >> - *to_mdp5_plane_state(plane_state) = >> - *to_mdp5_plane_state(new_plane_state); >> - >> - mdp5_plane_destroy_state(plane, new_plane_state); >> - >> - return 0; >> -slow_free: >> - mdp5_plane_destroy_state(plane, new_plane_state); >> -slow: >> - return drm_atomic_helper_update_plane(plane, crtc, fb, >> - crtc_x, crtc_y, crtc_w, crtc_h, >> - src_x, src_y, src_w, src_h, ctx); >> -} >> - >> /* >> * Use this func and the one below only after the atomic state has been >> * successfully swapped >> > diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 19e5a4f5529a..b384c985cd08 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -2230,13 +2230,14 @@ int drm_atomic_helper_disable_plane(struct drm_plane *plane, goto fail; } - if (plane_state->crtc && (plane == plane->crtc->cursor)) - plane_state->state->legacy_cursor_update = true; - ret = __drm_atomic_helper_disable_plane(plane, plane_state); if (ret != 0) goto fail; + if (plane_state->crtc && (plane == plane->crtc->cursor)) + plane_state->state->legacy_cursor_update = true; + + ret = drm_atomic_commit(state); fail: drm_atomic_state_put(state);