diff mbox series

sn65dsi83.c: fix dual-channel LVDS output also divide porches

Message ID BE0P281MB0211EB59ADE02F4DB8F9D0CDC22F2@BE0P281MB0211.DEUP281.PROD.OUTLOOK.COM (mailing list archive)
State New
Headers show
Series sn65dsi83.c: fix dual-channel LVDS output also divide porches | expand

Commit Message

Bauer, Markus Nov. 26, 2024, 9:42 a.m. UTC
sn65dsi83.c: fix dual-channel LVDS output also divide porches

When generating dual-channel LVDS to a single display, the
horizontal part has to be divided in halves for each channel.
This was done correctly for hactive, but not for the porches.

Of course this does only apply to sn65dsi84, which is also covered
by this driver.

Cc: stable@vger.kernel.org
Signed-off-by: Markus Bauer <markus.bauer2@avnet.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index ad73f69d768d..d71f752e79ec 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -399,7 +399,7 @@  static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
 	unsigned int pval;
 	__le16 le16val;
 	u16 val;
-	int ret;
+	int ret, hfront, hback;
 
 	ret = regulator_enable(ctx->vcc);
 	if (ret) {
@@ -521,12 +521,22 @@  static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
 	le16val = cpu_to_le16(mode->vsync_end - mode->vsync_start);
 	regmap_bulk_write(ctx->regmap, REG_VID_CHA_VSYNC_PULSE_WIDTH_LOW,
 			  &le16val, 2);
+
+	hback = mode->htotal - mode->hsync_end;
+	if (ctx->lvds_dual_link)
+		hback /= 2;
+
 	regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_BACK_PORCH,
-		     mode->htotal - mode->hsync_end);
+		     hback);
 	regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_BACK_PORCH,
 		     mode->vtotal - mode->vsync_end);
+
+	hfront = mode->hsync_start - mode->hdisplay;
+	if (ctx->lvds_dual_link)
+		hfront /= 2;
+
 	regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_FRONT_PORCH,
-		     mode->hsync_start - mode->hdisplay);
+		     hfront);
 	regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH,
 		     mode->vsync_start - mode->vdisplay);
 	regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);