[v2] drm/radeon: Print gart initialization details on all chipsets

Commit Message

Tormod Volden July 27, 2011, 12:24 p.m. UTC

From: Tormod Volden <[e-mail]>

The same way it was already done for r300.

Also fix typo in gart warning messages.

v2: Replace 0x%08X string format by %p

Signed-off-by: Tormod Volden <[e-mail]>

---

On Mon, Jul 25, 2011 at 1:03 PM, Dave Airlie <[e-mail]> wrote:
> Causes a new warning per line on x86-64 build.
>
> dma_addr_t doesn't go into %08x.
>
> Dave.

Would it be good enough to replace the %08x by %p, like in this patch?
I will be unable to test anything for the next week so feel free to
modify the patch as needed. (Hope the mailer won't reformat it.)

Tormod

 drivers/gpu/drm/radeon/evergreen.c   |    2 ++
 drivers/gpu/drm/radeon/ni.c          |    2 ++
 drivers/gpu/drm/radeon/r100.c        |    2 ++
 drivers/gpu/drm/radeon/r600.c        |    2 ++
 drivers/gpu/drm/radeon/radeon_gart.c |    4 ++--
 drivers/gpu/drm/radeon/rs400.c       |    2 ++
 drivers/gpu/drm/radeon/rs600.c       |    2 ++
 drivers/gpu/drm/radeon/rv770.c       |    2 ++
 8 files changed, 16 insertions(+), 2 deletions(-)

--
1.7.0.4

Patch

diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index e9bc135..e91d708 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -879,6 +879,8 @@  int evergreen_pcie_gart_enable(struct radeon_device *rdev)
       WREG32(VM_CONTEXT1_CNTL, 0);

       evergreen_pcie_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 7aade20..05b34f9 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -991,6 +991,8 @@  int cayman_pcie_gart_enable(struct radeon_device *rdev)
       WREG32(VM_CONTEXT1_CNTL, 0);

       cayman_pcie_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index f2204cb..b67719c 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -513,6 +513,8 @@  int r100_pci_gart_enable(struct radeon_device *rdev)
       tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;
       WREG32(RADEON_AIC_CNTL, tmp);
       r100_pci_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6f27593..3ca448f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -986,6 +986,8 @@  int r600_pcie_gart_enable(struct radeon_device *rdev)
               WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

       r600_pcie_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c
b/drivers/gpu/drm/radeon/radeon_gart.c
index 8a955bb..674a6ca 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -142,7 +142,7 @@  void radeon_gart_unbind(struct radeon_device
*rdev, unsigned offset,
       u64 page_base;

       if (!rdev->gart.ready) {
-               WARN(1, "trying to unbind memory to unitialized GART !\n");
+               WARN(1, "trying to unbind memory to uninitialized GART !\n");
               return;
       }
       t = offset / RADEON_GPU_PAGE_SIZE;
@@ -174,7 +174,7 @@  int radeon_gart_bind(struct radeon_device *rdev,
unsigned offset,
       int i, j;

       if (!rdev->gart.ready) {
-               WARN(1, "trying to bind memory to unitialized GART !\n");
+               WARN(1, "trying to bind memory to uninitialized GART !\n");
               return -EINVAL;
       }
       t = offset / RADEON_GPU_PAGE_SIZE;
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index aa6a66e..d9dc25e 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -182,6 +182,8 @@  int rs400_gart_enable(struct radeon_device *rdev)
       /* Enable gart */
       WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | size_reg));
       rs400_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 6e3b11e..3b6dce4 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -484,6 +484,8 @@  int rs600_gart_enable(struct radeon_device *rdev)
       tmp = RREG32_MC(R_000009_MC_CNTL1);
       WREG32_MC(R_000009_MC_CNTL1, (tmp | S_000009_ENABLE_PAGE_TABLES(1)));
       rs600_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index ef8a5ba..89b53ad 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -158,6 +158,8 @@  int rv770_pcie_gart_enable(struct radeon_device *rdev)
               WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

       r600_pcie_gart_tlb_flush(rdev);
+       DRM_INFO("PCIE GART of %uM enabled (table at %p).\n",
+                (unsigned)(rdev->mc.gtt_size >> 20), rdev->gart.table_addr);
       rdev->gart.ready = true;
       return 0;
 }