diff mbox series

[v2,2/2] drm/amdpgu: Use VRAM domain in UVD IB test

Message ID DM4PR12MB516520B50E5C61FD3C23D9CC87D29@DM4PR12MB5165.namprd12.prod.outlook.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] drm/ttm: Fix a deadlock if the target BO is not idle during swap | expand

Commit Message

Pan, Xinhui Sept. 6, 2021, 1:10 a.m. UTC 
[AMD Official Use Only]

Like vce/vcn does, visible VRAM is OK for ib test.
While commit a11d9ff3ebe0 ("drm/amdgpu: use GTT for
uvd_get_create/destory_msg") says VRAM is not mapped correctly in his
platform which is likely an arm64.

So lets change back to use VRAM on x86_64 platform.

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 8 ++++++++
 1 file changed, 8 insertions(+)

--
2.25.1

Comments

Wang, Kevin(Yang) Sept. 6, 2021, 2:55 a.m. UTC | #1 
[AMD Official Use Only]
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index d451c359606a..e4b75f33ccc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1178,7 +1178,11 @@  int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
        int r, i;

        r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+#ifdef CONFIG_X86_64
+                                     AMDGPU_GEM_DOMAIN_VRAM,
+#else
                                      AMDGPU_GEM_DOMAIN_GTT,
+#endif
                                      &bo, NULL, (void **)&msg);
        if (r)
                return r;
@@ -1210,7 +1214,11 @@  int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
        int r, i;

        r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
+#ifdef CONFIG_X86_64
+                                     AMDGPU_GEM_DOMAIN_VRAM,
+#else
                                      AMDGPU_GEM_DOMAIN_GTT,
+#endif
                                      &bo, NULL, (void **)&msg);
        if (r)
                return r;