b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -513,6 +513,7 @@ static struct radeon_i2c_bus_rec
combios_setup_i2c_bus(struct radeon_device *rde
case CHIP_RS100:
case CHIP_RV200:
case CHIP_RS200:
+ case CHIP_RS300:
switch (ddc_line) {
case RADEON_GPIO_DVI_DDC:
/* in theory this should be hw capable,
@@ -526,8 +527,17 @@ static struct radeon_i2c_bus_rec
combios_setup_i2c_bus(struct radeon_device *rde
}
break;
case CHIP_R200:
+ switch (ddc_line) {
+ case RADEON_GPIO_DVI_DDC:
+ case RADEON_GPIO_MONID:
+ i2c.hw_capable = true;
+ break;
+ default:
+ i2c.hw_capable = false;
+ break;
+ }
+ break;
case CHIP_RV250:
- case CHIP_RS300:
case CHIP_RV280:
switch (ddc_line) {
case RADEON_GPIO_VGA_DDC:
b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -228,6 +228,7 @@ static int r100_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
case CHIP_RS100:
case CHIP_RV200:
case CHIP_RS200:
+ case CHIP_RS300:
switch (rec->mask_clk_reg) {
case RADEON_GPIO_DVI_DDC:
/* no gpio select bit */
@@ -239,8 +240,21 @@ static int r100_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
}
break;
case CHIP_R200:
+ /* only bit 4 on r200 */
+ switch (rec->mask_clk_reg) {
+ case RADEON_GPIO_DVI_DDC:
+ reg |= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1);
+ break;
+ case RADEON_GPIO_MONID:
+ reg |= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3);
+ break;
+ default:
+ DRM_ERROR("gpio not supported with hw i2c\n");
+ ret = -EINVAL;
+ goto done;
+ }
+ break;
case CHIP_RV250:
- case CHIP_RS300:
case CHIP_RV280:
/* bits 3 and 4 */
switch (rec->mask_clk_reg) {