| Message ID | b2cba542d148f9f955469f6ff7ae0514b825b646.1607893119.git.tommyhebb@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [RESEND] drm/rockchip: dsi: move all lane config except LCDC mux to bind() | expand |
В Вс, 13/12/2020 в 12:58 -0800, Thomas Hebb пишет: > When we first enable the DSI encoder, we currently program some per-chip > configuration that we look up in rk3399_chip_data based on the device > tree compatible we match. This data configures various parameters of the > MIPI lanes, including on RK3399 whether DSI1 is slaved to DSI0 in a > dual-mode configuration. It also selects which LCDC (i.e. VOP) to scan > out from. > > This causes a problem in RK3399 dual-mode configurations, though: panel > prepare() callbacks run before the encoder gets enabled and expect to be > able to write commands to the DSI bus, but the bus isn't fully > functional until the lane and master/slave configuration have been > programmed. As a result, dual-mode panels (and possibly others too) fail > to turn on when the rockchipdrm driver is initially loaded. > > Because the LCDC mux is the only thing we don't know until enable time > (and is the only thing that can ever change), we can actually move most > of the initialization to bind() and get it out of the way early. That's > what this change does. (Rockchip's 4.4 BSP kernel does it in mode_set(), > which also avoids the issue, but bind() seems like the more correct > place to me.) > > Tested on a Google Scarlet board (Acer Chromebook Tab 10), which has a > Kingdisplay KD097D04 dual-mode panel. Prior to this change, the panel's > backlight would turn on but no image would appear when initially loading > rockchipdrm. If I kept rockchipdrm loaded and reloaded the panel driver, > it would come on. With this change, the panel successfully turns on > during initial rockchipdrm load as expected. > > Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver") > Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> > --- > Resending since I wasn't subscribed to dri-devel > > .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 36 ++++++++++++++----- > 1 file changed, 28 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c > index ce044db8c97e..d0c9610ad220 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c > @@ -691,13 +691,8 @@ static const struct dw_mipi_dsi_phy_ops dw_mipi_dsi_rockchip_phy_ops = { > .get_timing = dw_mipi_dsi_phy_get_timing, > }; > > > -static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi, > - int mux) > +static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi) > { > - if (dsi->cdata->lcdsel_grf_reg) > - regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg, > - mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big); > - > if (dsi->cdata->lanecfg1_grf_reg) > regmap_write(dsi->grf_regmap, dsi->cdata->lanecfg1_grf_reg, > dsi->cdata->lanecfg1); > @@ -711,6 +706,13 @@ static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi, > dsi->cdata->enable); > } > > > +static void dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi, > + int mux) > +{ > + regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg, > + mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big); > +} > + > static int > dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder, > struct drm_crtc_state *crtc_state, > @@ -766,9 +768,9 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) > return; > } > > > - dw_mipi_dsi_rockchip_config(dsi, mux); > + dw_mipi_dsi_rockchip_set_lcdsel(dsi, mux); > if (dsi->slave) > - dw_mipi_dsi_rockchip_config(dsi->slave, mux); > + dw_mipi_dsi_rockchip_set_lcdsel(dsi->slave, mux); > > > clk_disable_unprepare(dsi->grf_clk); > } > @@ -922,6 +924,24 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, > return ret; > } > > > + /* > + * With the GRF clock running, write lane and dual-mode configurations > + * that won't change immediately. If we waited until enable() to do > + * this, things like panel preparation would not be able to send > + * commands over DSI. > + */ > + ret = clk_prepare_enable(dsi->grf_clk); > + if (ret) { > + DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); > + return ret; > + } > + > + dw_mipi_dsi_rockchip_config(dsi); > + if (dsi->slave) > + dw_mipi_dsi_rockchip_config(dsi->slave); > + > + clk_disable_unprepare(dsi->grf_clk); > + > ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); > if (ret) { > DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); Have tested this patch on a Pine64 RockPro64 v2.1 with Linux v5.4.44 All works good when DRM_PANEL_KINGDISPLAY_KD097D04=m Something bad happens when DRM_PANEL_KINGDISPLAY_KD097D04=y - the panel driver starts again to fail to write prepare() commands to DSI: [ 28.709049] 005: dw-mipi-dsi-rockchip ff960000.mipi: failed to write command FIFO [ 28.709056] 005: panel-kingdisplay-kd097d04 ff960000.mipi.0: [drm:kingdisplay_panel_prepare] *ERROR* failed write init cmds: -110 [ 0.000000] 000: Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 0.000000] 000: Linux version 5.4.44-rt26 (aleksandr@assa) (gcc version 7.5.0 (GCC)) #2 SMP PREEMPT Wed Jan 20 10:35:20 MST 2021 [ 0.000000] 000: Machine model: Rockchip RK3399 Board Box (DS100) [ 0.000000] 000: earlycon: uart8250 at MMIO32 0x00000000ff1a0000 (options '') [ 0.000000] 000: printk: bootconsole [uart8250] enabled [ 0.000000] 000: efi: Getting EFI parameters from FDT: [ 0.000000] 000: efi: UEFI not found. [ 0.000000] 000: cma: Reserved 32 MiB at 0x000000007e000000 [ 0.000000] 000: NUMA: No NUMA configuration found [ 0.000000] 000: NUMA: Faking a node at [mem 0x0000000000200000-0x000000007fffffff] [ 0.000000] 000: NUMA: NODE_DATA [mem 0x7dba3800-0x7dba4fff] [ 0.000000] 000: Zone ranges: [ 0.000000] 000: DMA32 [mem 0x0000000000200000-0x000000007fffffff] [ 0.000000] 000: Normal empty [ 0.000000] 000: Movable zone start for each node [ 0.000000] 000: Early memory node ranges [ 0.000000] 000: node 0: [mem 0x0000000000200000-0x000000007fffffff] [ 0.000000] 000: Initmem setup node 0 [mem 0x0000000000200000-0x000000007fffffff] [ 0.000000] 000: On node 0 totalpages: 523776 [ 0.000000] 000: DMA32 zone: 8184 pages used for memmap [ 0.000000] 000: DMA32 zone: 0 pages reserved [ 0.000000] 000: DMA32 zone: 523776 pages, LIFO batch:63 [ 0.000000] 000: psci: probing for conduit method from DT. [ 0.000000] 000: psci: PSCIv1.0 detected in firmware. [ 0.000000] 000: psci: Using standard PSCI v0.2 function IDs [ 0.000000] 000: psci: Trusted OS migration not required [ 0.000000] 000: psci: SMC Calling Convention v1.0 [ 0.000000] 000: percpu: Embedded 18 pages/cpu s33432 r8192 d32104 u73728 [ 0.000000] 000: pcpu-alloc: s33432 r8192 d32104 u73728 alloc=18*4096 [ 0.000000] 000: pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [ 0.000000] 000: Detected VIPT I-cache on CPU0 [ 0.000000] 000: CPU features: detected: ARM erratum 845719 [ 0.000000] 000: CPU features: detected: GIC system register CPU interface [ 0.000000] 000: Built 1 zonelists, mobility grouping on. Total pages: 515592 [ 0.000000] 000: Policy zone: DMA32 [ 0.000000] 000: Kernel command line: earlycon=uart8250,mmio32,0xff1a0000 console=ttyS2,115200n8 [ 0.000000] 000: Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) [ 0.000000] 000: Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) [ 0.000000] 000: mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] 000: Memory: 2001772K/2095104K available (10812K kernel code, 862K rwdata, 4484K rodata, 3136K init, 439K bss, 60564K reserved, 32768K cma-reserved) [ 0.000000] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1 [ 0.000000] 000: rcu: Preemptible hierarchical RCU implementation. [ 0.000000] 000: rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=6. [ 0.000000] 000: Tasks RCU enabled. [ 0.000000] 000: rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] 000: rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 [ 0.000000] 000: NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] 000: GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] 000: GICv3: 256 SPIs implemented [ 0.000000] 000: GICv3: 0 Extended SPIs implemented [ 0.000000] 000: GICv3: Distributor has no Range Selector support [ 0.000000] 000: GICv3: 16 PPIs implemented [ 0.000000] 000: GICv3: no VLPI support, no direct LPI support [ 0.000000] 000: GICv3: CPU0: found redistributor 0 region 0:0x00000000fef00000 [ 0.000000] 000: ITS [mem 0xfee20000-0xfee3ffff] [ 0.000000] 000: ITS@0x00000000fee20000: allocated 65536 Devices @7b080000 (flat, esz 8, psz 64K, shr 0) [ 0.000000] 000: ITS: using cache flushing for cmd queue [ 0.000000] 000: GICv3: using LPI property table @0x000000007b040000 [ 0.000000] 000: GIC: using cache flushing for LPI property table [ 0.000000] 000: GICv3: CPU0: using allocated LPI pending table @0x000000007b050000 [ 0.000000] 000: GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] } [ 0.000000] 000: GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] } [ 0.000000] 000: random: get_random_bytes called from start_kernel+0x2b8/0x458 with crng_init=0 [ 0.000000] 000: arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.000000] 000: clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000001] 000: sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.011136] 000: Console: colour dummy device 80x25 [ 0.025947] 000: Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.030582] 000: pid_max: default: 32768 minimum: 301 [ 0.036336] 000: LSM: Security Framework initializing [ 0.042028] 000: Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) [ 0.050679] 000: Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) [ 0.083976] 000: ASID allocator initialised with 32768 entries [ 0.098475] 000: rcu: Hierarchical SRCU implementation. [ 0.112449] 000: Platform MSI: interrupt-controller@fee20000 domain created [ 0.120642] 000: PCI/MSI: /interrupt-controller@fee00000/interrupt-controller@fee20000 domain created [ 0.133296] 000: EFI services will not be available. [ 0.146837] 000: smp: Bringing up secondary CPUs ... [ 0.184753] 001: Detected VIPT I-cache on CPU1 [ 0.189702] 001: GICv3: CPU1: found redistributor 1 region 0:0x00000000fef20000 [ 0.197753] 001: GICv3: CPU1: using allocated LPI pending table @0x000000007b060000 [ 0.206228] 001: CPU1: Booted secondary processor 0x0000000001 [0x410fd034] [ 0.244985] 002: Detected VIPT I-cache on CPU2 [ 0.249933] 002: GICv3: CPU2: found redistributor 2 region 0:0x00000000fef40000 [ 0.257986] 002: GICv3: CPU2: using allocated LPI pending table @0x000000007b070000 [ 0.266460] 002: CPU2: Booted secondary processor 0x0000000002 [0x410fd034] [ 0.305228] 003: Detected VIPT I-cache on CPU3 [ 0.310176] 003: GICv3: CPU3: found redistributor 3 region 0:0x00000000fef60000 [ 0.318229] 003: GICv3: CPU3: using allocated LPI pending table @0x000000007b100000 [ 0.326695] 003: CPU3: Booted secondary processor 0x0000000003 [0x410fd034] [ 0.374392] 004: CPU features: detected: EL2 vector hardening [ 0.382401] 004: ARM_SMCCC_ARCH_WORKAROUND_1 missing from firmware [ 0.390591] 004: Detected PIPT I-cache on CPU4 [ 0.397370] 004: GICv3: CPU4: found redistributor 100 region 0:0x00000000fef80000 [ 0.407397] 004: GICv3: CPU4: using allocated LPI pending table @0x000000007b110000 [ 0.418296] 004: CPU4: Booted secondary processor 0x0000000100 [0x410fd082] [ 0.472558] 005: Detected PIPT I-cache on CPU5 [ 0.479686] 005: GICv3: CPU5: found redistributor 101 region 0:0x00000000fefa0000 [ 0.489755] 005: GICv3: CPU5: using allocated LPI pending table @0x000000007b120000 [ 0.500672] 005: CPU5: Booted secondary processor 0x0000000101 [0x410fd082] [ 0.516400] 000: smp: Brought up 1 node, 6 CPUs [ 0.521553] 000: SMP: Total of 6 processors activated. [ 0.527237] 000: CPU features: detected: 32-bit EL0 Support [ 0.533493] 000: CPU features: detected: CRC32 instructions [ 0.671527] 000: CPU: All CPU(s) started at EL2 [ 0.677241] 000: alternatives: patching kernel code [ 0.688000] 000: devtmpfs: initialized [ 0.719241] 000: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.730844] 000: futex hash table entries: 2048 (order: 5, 131072 bytes, linear) [ 0.773838] 005: pinctrl core: initialized pinctrl subsystem [ 0.818031] 005: DMI not present or invalid. [ 0.839405] 005: NET: Registered protocol family 16 [ 0.951967] 005: DMA: preallocated 256 KiB pool for atomic allocations [ 0.961316] 005: audit: initializing netlink subsys (disabled) [ 0.973044] 002: audit: type=2000 audit(0.884:1): state=initialized audit_enabled=0 res=1 [ 1.035456] 004: cpuidle: using governor menu [ 1.051836] 004: hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 1.111889] 004: Serial: AMBA PL011 UART driver [ 2.793928] 004: HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages [ 2.803858] 004: HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages [ 2.813593] 004: HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages [ 2.823251] 004: HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages [ 3.017311] 004: cryptd: max_cpu_qlen set to 1000 [ 3.294570] 005: ACPI: Interpreter disabled. [ 3.348254] 005: vcc3v3_sys: supplied by vcc5v0_sys [ 3.376026] 005: vcc3v3_pcie: supplied by vcc3v3_sys [ 3.402709] 005: vcc5v0_host: supplied by vcc5v0_sys [ 3.436743] 005: iommu: Default domain type: Translated [ 3.539413] 005: vgaarb: loaded [ 3.560962] 005: usbcore: registered new interface driver usbfs [ 3.571562] 005: usbcore: registered new interface driver hub [ 3.584117] 005: usbcore: registered new device driver usb [ 3.615416] 005: mc: Linux media interface: v0.10 [ 3.623470] 005: videodev: Linux video capture interface: v2.00 [ 3.633684] 005: pps_core: LinuxPPS API ver. 1 registered [ 3.641178] 005: pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> [ 3.654756] 005: PTP clock support registered [ 3.668630] 005: EDAC MC: Ver: 3.0.0 [ 3.702112] 004: FPGA manager framework [ 3.718960] 004: Advanced Linux Sound Architecture Driver Initialized. [ 3.761752] 004: clocksource: Switched to clocksource arch_sys_counter [ 3.779955] 004: VFS: Disk quotas dquot_6.6.0 [ 3.789112] 004: VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 3.811824] 004: pnp: PnP ACPI: disabled [ 4.171611] 005: thermal_sys: Registered thermal governor 'step_wise' [ 4.181373] 005: thermal_sys: Registered thermal governor 'power_allocator' [ 4.208629] 005: NET: Registered protocol family 2 [ 4.238348] 005: tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear) [ 4.252912] 005: TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear) [ 4.275097] 005: TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear) [ 4.304270] 005: TCP: Hash tables configured (established 16384 bind 16384) [ 4.319066] 005: UDP hash table entries: 1024 (order: 3, 32768 bytes, linear) [ 4.333014] 005: UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear) [ 4.354721] 005: NET: Registered protocol family 1 [ 4.362782] 005: PCI: CLS 0 bytes, default 64 [ 4.518456] 004: hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available [ 4.546647] 004: hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available [ 5.156308] 004: Initialise system trusted keyrings [ 5.167736] 004: workingset: timestamp_bits=44 max_order=19 bucket_order=0 [ 5.591524] 004: squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 5.615061] 005: fuse: init (API version 7.31) [ 7.019269] 005: Key type asymmetric registered [ 7.026274] 005: Asymmetric key parser 'x509' registered [ 7.035157] 005: Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) [ 7.045964] 005: io scheduler mq-deadline registered [ 7.052894] 005: io scheduler kyber registered [ 7.294300] 005: rockchip-pcie f8000000.pcie: no vpcie12v regulator found [ 7.308159] 005: rockchip-pcie f8000000.pcie: no vpcie1v8 regulator found [ 7.318552] 005: rockchip-pcie f8000000.pcie: no vpcie0v9 regulator found [ 7.336360] 005: rockchip-pcie f8000000.pcie: host bridge /pcie@f8000000 ranges: [ 7.347642] 005: rockchip-pcie f8000000.pcie: MEM 0xfa000000..0xfbdfffff -> 0xfa000000 [ 7.359264] 005: rockchip-pcie f8000000.pcie: IO 0xfbe00000..0xfbefffff -> 0xfbe00000 [ 7.382128] 005: rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00 [ 7.392035] 005: pci_bus 0000:00: root bus resource [bus 00-1f] [ 7.400626] 005: pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff] [ 7.410860] 005: pci_bus 0000:00: root bus resource [io 0x0000-0xfffff] (bus address [0xfbe00000-0xfbefffff]) [ 7.426091] 005: pci 0000:00:00.0: [1d87:0100] type 01 class 0x060400 [ 7.438773] 005: pci 0000:00:00.0: supports D1 [ 7.445743] 005: pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 7.669889] 005: pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 7.688106] 005: pci 0000:01:00.0: [8086:1532] type 00 class 0x020000 [ 7.699835] 005: pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x0001ffff] [ 7.710363] 005: pci 0000:01:00.0: reg 0x18: initial BAR value 0x00000000 invalid [ 7.720725] 005: pci 0000:01:00.0: reg 0x18: [io size 0x0020] [ 7.729253] 005: pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x00003fff] [ 7.739724] 005: pci 0000:01:00.0: Max Payload Size set to 256 (was 128, max 512) [ 7.754177] 005: pci 0000:01:00.0: PME# supported from D0 D3hot D3cold [ 7.978346] 005: pci_bus 0000:01: busn_res: [bus 01-1f] end is updated to 01 [ 7.988888] 005: pci 0000:00:00.0: BAR 14: assigned [mem 0xfa000000-0xfa0fffff] [ 7.999379] 005: pci 0000:01:00.0: BAR 0: assigned [mem 0xfa000000-0xfa01ffff] [ 8.010689] 005: pci 0000:01:00.0: BAR 3: assigned [mem 0xfa020000-0xfa023fff] [ 8.020969] 005: pci 0000:01:00.0: BAR 2: no space for [io size 0x0020] [ 8.030341] 005: pci 0000:01:00.0: BAR 2: failed to assign [io size 0x0020] [ 8.040206] 005: pci 0000:00:00.0: PCI bridge to [bus 01] [ 8.047960] 005: pci 0000:00:00.0: bridge window [mem 0xfa000000-0xfa0fffff] [ 8.064555] 005: pcieport 0000:00:00.0: enabling device (0000 -> 0002) [ 8.086615] 005: pcieport 0000:00:00.0: PME: Signaling with IRQ 211 [ 8.106729] 005: pcieport 0000:00:00.0: AER: enabled with IRQ 211 [ 8.184689] 005: pwm-backlight backlight: backlight supply power not found, using dummy regulator [ 8.208108] 005: IPMI message handler: version 39.2 [ 8.219540] 005: ipmi device interface [ 8.227042] 005: ipmi_si: IPMI System Interface driver [ 8.251421] 005: ipmi_si: Unable to find any System Interface(s) [ 8.366254] 004: dma-pl330 ff6d0000.dma-controller: Loaded driver for PL330 DMAC-241330 [ 8.378623] 004: dma-pl330 ff6d0000.dma-controller: DBUFF-32x8bytes Num_Chans-6 Num_Peri-12 Num_Events-12 [ 8.470622] 004: dma-pl330 ff6e0000.dma-controller: Loaded driver for PL330 DMAC-241330 [ 8.481836] 004: dma-pl330 ff6e0000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-20 Num_Events-16 [ 8.726189] 005: Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 8.827809] 005: printk: console [ttyS2] disabled [ 8.836992] 005: ff1a0000.serial: ttyS2 at MMIO 0xff1a0000 (irq = 30, base_baud = 1500000) is a 16550A [ 8.858371] 004: printk: console [ttyS2] enabled [ 8.866584] 004: printk: bootconsole [uart8250] disabled [ 8.973266] 004: rockchip-vop ff8f0000.vop: Adding to iommu group 1 [ 8.995776] 004: rockchip-vop ff900000.vop: Adding to iommu group 2 [ 9.088586] 005: panel-kingdisplay-kd097d04 ff960000.mipi.0: ff960000.mipi.0 supply power not found, using dummy regulator [ 9.136452] 005: rockchip-drm display-subsystem: bound ff8f0000.vop (ops vop_component_ops) [ 9.171314] 004: rockchip-drm display-subsystem: bound ff900000.vop (ops vop_component_ops) [ 9.184352] 004: rockchip-drm display-subsystem: bound ff960000.mipi (ops dw_mipi_dsi_rockchip_ops) [ 9.184965] 004: [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 9.185123] 004: [drm] No driver support for vblank timestamp query. [ 10.434775] 005: dw-mipi-dsi-rockchip ff960000.mipi: [drm:dw_mipi_dsi_get_lane_mbps] *ERROR* DPHY clock frequency is out of range [ 13.942094] 004: rockchip-drm display-subsystem: fb0: rockchipdrmfb frame buffer device [ 13.962430] 004: [drm] Initialized rockchip 1.0.0 20140818 for display-subsystem on minor 0 [ 13.994803] 004: panfrost ff9a0000.gpu: clock rate = 500000000 [ 13.996570] 004: panfrost ff9a0000.gpu: failed to get regulator: -517 [ 13.996891] 004: panfrost ff9a0000.gpu: regulator init failed -517 [ 14.014980] 000: cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 12.349141] 005: Console: switching to colour frame buffer device 192x128 [ 14.482693] 005: loop: module loaded [ 15.529774] 000: random: fast init done [ 15.546393] 005: libphy: Fixed MDIO Bus: probed [ 15.547780] 005: tun: Universal TUN/TAP device driver, 1.6 [ 15.555240] 005: e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k [ 15.555452] 005: e1000e: Copyright(c) 1999 - 2015 Intel Corporation. [ 15.558712] 005: igb: Intel(R) Gigabit Ethernet Network Driver - version 5.6.0-k [ 15.558919] 005: igb: Copyright (c) 2007-2014 Intel Corporation. [ 15.563329] 005: igb 0000:01:00.0: enabling device (0000 -> 0002) [ 15.687607] 004: pps pps0: new PPS source ptp0 [ 15.697069] 004: igb 0000:01:00.0: added PHC on eth0 [ 15.698223] 004: igb 0000:01:00.0: Intel(R) Gigabit Ethernet Network Connection [ 15.698521] 004: igb 0000:01:00.0: eth0: (PCIe:2.5Gb/s:Width x1) 40:ef:ef:97:37:7b [ 15.698928] 004: igb 0000:01:00.0: eth0: PBA No: FFFFFF-0FF [ 15.699187] 004: igb 0000:01:00.0: Using MSI-X interrupts. 2 rx queue(s), 2 tx queue(s) [ 15.702961] 004: igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k [ 15.703156] 004: igbvf: Copyright (c) 2009 - 2012 Intel Corporation. [ 15.711432] 004: VFIO - User Level meta-driver version: 0.3 [ 15.781117] 004: ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 15.783212] 004: ehci-pci: EHCI PCI platform driver [ 15.786140] 004: ehci-platform: EHCI generic platform driver [ 15.795033] 004: ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 15.795764] 004: ohci-pci: OHCI PCI platform driver [ 15.798230] 004: ohci-platform: OHCI generic platform driver [ 15.963899] 004: i2c /dev entries driver [ 16.008859] 005: [hycon] hy46xx_ts_probe,1296 --> [ 16.011643] 005: * int_gpio: int (null) [ 16.013204] 005: * reset_gpio: reset (null) [ 16.015717] 005: * pwen_gpio: pwen (null) [ 16.016155] 005: irq = 0 [ 16.030254] 005: input: hy46xx_ts as /devices/virtual/input/input0 [ 18.152135] 005: [HYS] Firmware version = 0xff [ 18.202057] 005: fan53555-regulator 0-0040: FAN53555 Option[8] Rev[1] Detected! [ 18.203502] 005: fan53555-reg: supplied by vcc5v0_sys [ 18.244521] 005: fan53555-regulator 0-0041: FAN53555 Option[8] Rev[1] Detected! [ 18.246323] 005: fan53555-reg: supplied by vcc5v0_sys [ 18.294210] 004: rk808 0-001b: chip id: 0x0 [ 18.416252] 004: rk808-regulator rk808-regulator: there is no dvs0 gpio [ 18.418498] 004: rk808-regulator rk808-regulator: there is no dvs1 gpio [ 18.421121] 004: DCDC_REG1: supplied by vcc5v0_sys [ 18.442733] 004: DCDC_REG2: supplied by vcc5v0_sys [ 18.458911] 004: DCDC_REG3: supplied by vcc5v0_sys [ 18.472235] 004: DCDC_REG4: supplied by vcc5v0_sys [ 18.488481] 004: LDO_REG1: supplied by vcc5v0_sys [ 18.508649] 004: LDO_REG2: supplied by vcc5v0_sys [ 18.514291] 004: vcca3v0_codec: Bringing 1800000uV into 3300000-3300000uV [ 18.531953] 004: LDO_REG3: supplied by vcc5v0_sys [ 18.552160] 004: LDO_REG4: supplied by vcc5v0_sys [ 18.572939] 005: LDO_REG5: supplied by vcc5v0_sys [ 18.576622] 005: vcc3v3_lan: Bringing 3000000uV into 3300000-3300000uV [ 18.597059] 005: LDO_REG6: supplied by vcc5v0_sys [ 18.618754] 005: LDO_REG7: supplied by vcc5v0_sys [ 18.622312] 005: vcca1v8_codec: Bringing 900000uV into 1800000-1800000uV [ 18.640582] 005: LDO_REG8: supplied by vcc5v0_sys [ 18.663014] 005: SWITCH_REG1: supplied by vcc3v3_sys [ 18.676265] 005: SWITCH_REG2: supplied by vcc3v3_sys [ 18.744569] 005: rk808-rtc rk808-rtc: registered as rtc0 [ 18.774733] 005: usbcore: registered new interface driver uvcvideo [ 18.774984] 005: USB Video Class driver (1.1.1) [ 18.906821] 004: device-mapper: ioctl: 4.41.0-ioctl (2019-09-16) initialised: dm-devel@redhat.com [ 18.983094] 005: cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 400000 KHz [ 18.989991] 005: cpufreq: cpufreq_online: CPU0: Unlisted initial frequency changed to: 408000 KHz [ 19.071025] 004: cpufreq: cpufreq_online: CPU4: Running at unlisted freq: 12000 KHz [ 19.087111] 004: cpufreq: cpufreq_online: CPU4: Unlisted initial frequency changed to: 408000 KHz [ 19.089063] 004: sdhci: Secure Digital Host Controller Interface driver [ 19.089065] 004: sdhci: Copyright(c) Pierre Ossman [ 19.089139] 004: Synopsys Designware Multimedia Card Interface Driver [ 19.089631] 004: dwmmc_rockchip fe320000.dwmmc: IDMAC supports 32-bit address mode. [ 19.089643] 004: dwmmc_rockchip fe320000.dwmmc: Using internal DMA controller. [ 19.089651] 004: dwmmc_rockchip fe320000.dwmmc: Version ID is 270a [ 19.089676] 004: dwmmc_rockchip fe320000.dwmmc: DW MMC controller at irq 27,32 bit host data width,256 deep fifo [ 19.101351] 004: mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 19.114200] 004: sdhci-pltfm: SDHCI platform and OF driver helper [ 19.114772] 004: mmc1: CQHCI version 5.10 [ 19.140620] 004: mmc1: SDHCI controller on fe330000.sdhci [fe330000.sdhci] using ADMA [ 19.141797] 004: ledtrig-cpu: registered to indicate activity on CPUs [ 19.142215] 004: usbcore: registered new interface driver usbhid [ 19.142217] 004: usbhid: USB HID core driver [ 19.144770] 004: NET: Registered protocol family 10 [ 19.145168] 004: Segment Routing with IPv6 [ 19.145339] 004: sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 19.145602] 004: NET: Registered protocol family 17 [ 19.145621] 004: bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 19.145622] 004: 8021q: 802.1Q VLAN Support v1.8 [ 19.145664] 004: Key type dns_resolver registered [ 19.146618] 004: registered taskstats version 1 [ 19.146622] 004: Loading compiled-in X.509 certificates [ 19.161867] 004: panfrost ff9a0000.gpu: clock rate = 500000000 [ 19.174338] 004: panfrost ff9a0000.gpu: mali-t860 id 0x860 major 0x2 minor 0x0 status 0x0 [ 19.174345] 004: panfrost ff9a0000.gpu: features: 00000000,100e77bf, issues: 00000000,24040400 [ 19.174349] 004: panfrost ff9a0000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7 [ 19.174352] 004: panfrost ff9a0000.gpu: shader_present=0xf l2_present=0x1 [ 19.218951] 004: [drm] Initialized panfrost 1.1.0 20180908 for ff9a0000.gpu on minor 1 [ 19.225322] 005: rk808-rtc rk808-rtc: setting system clock to 2013-01-18T08:50:27 UTC (1358499027) [ 19.226040] 005: ALSA device list: [ 19.226044] 005: No soundcards found. [ 19.226069] 005: Warning: unable to open an initial console. [ 19.227570] 005: Freeing unused kernel memory: 3136K [ 19.245382] 005: Run /init as init process [ 19.249731] 005: ttyS2 - failed to request DMA [ 19.325673] 004: mmc1: Command Queue Engine enabled [ 19.325685] 004: mmc1: new HS200 MMC card at address 0001 [ 19.326242] 004: mmcblk1: mmc1:0001 8GTF4R 7.28 GiB [ 19.326306] 004: mmcblk1boot0: mmc1:0001 8GTF4R partition 1 4.00 MiB [ 19.326370] 004: mmcblk1boot1: mmc1:0001 8GTF4R partition 2 4.00 MiB [ 19.326613] 004: mmcblk1rpmb: mmc1:0001 8GTF4R partition 3 512 KiB, chardev (240:0) [ 19.334936] 004: GPT:Primary header thinks Alt. header is not at the end of the disk. [ 19.334941] 004: GPT:4194303 != 15269887 [ 19.334945] 004: GPT:Alternate GPT header not at the end of the disk. [ 19.334946] 004: GPT:4194303 != 15269887 [ 19.334947] 004: GPT: Use GNU Parted to correct GPT errors. [ 19.334966] 004: mmcblk1: p2 p3 p4 p5 p6 [ 23.286170] 004: EXT4-fs (mmcblk1p2): VFS: Can't find ext4 filesystem [ 23.286714] 005: EXT4-fs (mmcblk1p3): VFS: Can't find ext4 filesystem [ 23.302628] 005: EXT4-fs (mmcblk1p4): VFS: Can't find ext4 filesystem [ 23.320884] 005: EXT4-fs (mmcblk1p5): recovery complete [ 23.321375] 005: EXT4-fs (mmcblk1p5): mounted filesystem with ordered data mode. Opts: (null) [ 23.360368] 004: overlayfs: upper fs does not support xattr, falling back to index=off and metacopy=off. [ 23.795396] 005: random: udevd: uninitialized urandom read (16 bytes read) [ 23.795480] 005: random: udevd: uninitialized urandom read (16 bytes read) [ 23.795497] 005: random: udevd: uninitialized urandom read (16 bytes read) [ 23.817228] 005: udevd[342]: specified group 'input' unknown [ 23.817525] 005: udevd[342]: specified group 'kvm' unknown [ 23.829474] 002: udevd[343]: starting eudev-3.2.7 [ 25.258788] 004: qsys_proc: loading out-of-tree module taints kernel. [ 25.648990] 005: EXT4-fs (loop1): mounted filesystem with ordered data mode. Opts: (null) [ 25.649008] 005: ext4 filesystem being mounted at /var/rwfs2 supports timestamps until 2038 (0x7fffffff) [ 26.048383] 004: 8021q: adding VLAN 0 to HW filter on device eth0 [ 28.709049] 005: dw-mipi-dsi-rockchip ff960000.mipi: failed to write command FIFO [ 28.709056] 005: panel-kingdisplay-kd097d04 ff960000.mipi.0: [drm:kingdisplay_panel_prepare] *ERROR* failed write init cmds: -110 [ 29.001848] 004: igb 0000:01:00.0 eth0: igb: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: RX/TX [ 29.217639] 004: IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 30.744632] 005: urandom_read: 3 callbacks suppressed [ 30.744642] 005: random: tsc8_splash: uninitialized urandom read (8 bytes read) [ 32.971563] 005: random: dbus-daemon: uninitialized urandom read (12 bytes read) [ 32.972454] 005: random: dbus-daemon: uninitialized urandom read (8 bytes read) [ 32.972798] 005: random: dbus-daemon: uninitialized urandom read (12 bytes read) [ 34.741288] 004: random: crng init done
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index ce044db8c97e..d0c9610ad220 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -691,13 +691,8 @@ static const struct dw_mipi_dsi_phy_ops dw_mipi_dsi_rockchip_phy_ops = { .get_timing = dw_mipi_dsi_phy_get_timing, }; -static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi, - int mux) +static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi) { - if (dsi->cdata->lcdsel_grf_reg) - regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg, - mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big); - if (dsi->cdata->lanecfg1_grf_reg) regmap_write(dsi->grf_regmap, dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1); @@ -711,6 +706,13 @@ static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi, dsi->cdata->enable); } +static void dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi, + int mux) +{ + regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg, + mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big); +} + static int dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, @@ -766,9 +768,9 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) return; } - dw_mipi_dsi_rockchip_config(dsi, mux); + dw_mipi_dsi_rockchip_set_lcdsel(dsi, mux); if (dsi->slave) - dw_mipi_dsi_rockchip_config(dsi->slave, mux); + dw_mipi_dsi_rockchip_set_lcdsel(dsi->slave, mux); clk_disable_unprepare(dsi->grf_clk); } @@ -922,6 +924,24 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, return ret; } + /* + * With the GRF clock running, write lane and dual-mode configurations + * that won't change immediately. If we waited until enable() to do + * this, things like panel preparation would not be able to send + * commands over DSI. + */ + ret = clk_prepare_enable(dsi->grf_clk); + if (ret) { + DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); + return ret; + } + + dw_mipi_dsi_rockchip_config(dsi); + if (dsi->slave) + dw_mipi_dsi_rockchip_config(dsi->slave); + + clk_disable_unprepare(dsi->grf_clk); + ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); if (ret) { DRM_DEV_ERROR(dev, "Failed to create drm encoder\n");
When we first enable the DSI encoder, we currently program some per-chip configuration that we look up in rk3399_chip_data based on the device tree compatible we match. This data configures various parameters of the MIPI lanes, including on RK3399 whether DSI1 is slaved to DSI0 in a dual-mode configuration. It also selects which LCDC (i.e. VOP) to scan out from. This causes a problem in RK3399 dual-mode configurations, though: panel prepare() callbacks run before the encoder gets enabled and expect to be able to write commands to the DSI bus, but the bus isn't fully functional until the lane and master/slave configuration have been programmed. As a result, dual-mode panels (and possibly others too) fail to turn on when the rockchipdrm driver is initially loaded. Because the LCDC mux is the only thing we don't know until enable time (and is the only thing that can ever change), we can actually move most of the initialization to bind() and get it out of the way early. That's what this change does. (Rockchip's 4.4 BSP kernel does it in mode_set(), which also avoids the issue, but bind() seems like the more correct place to me.) Tested on a Google Scarlet board (Acer Chromebook Tab 10), which has a Kingdisplay KD097D04 dual-mode panel. Prior to this change, the panel's backlight would turn on but no image would appear when initially loading rockchipdrm. If I kept rockchipdrm loaded and reloaded the panel driver, it would come on. With this change, the panel successfully turns on during initial rockchipdrm load as expected. Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> --- Resending since I wasn't subscribed to dri-devel .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 36 ++++++++++++++----- 1 file changed, 28 insertions(+), 8 deletions(-)