| Message ID | c9f9fc1d5b796b7a78e7e27849abb435c6bcbc43.1636573413.git.hns@goldelico.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MIPS: JZ4780 and CI20 HDMI | expand |
Hi Nikolaus, Le mer., nov. 10 2021 at 20:43:30 +0100, H. Nikolaus Schaller <hns@goldelico.com> a écrit : > From: Paul Boddie <paul@boddie.org.uk> > > A specialisation of the generic Synopsys HDMI driver is employed for > JZ4780 > HDMI support. This requires a new driver, plus device tree and > configuration > modifications. > > Signed-off-by: Paul Boddie <paul@boddie.org.uk> > Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> > --- > arch/mips/boot/dts/ingenic/jz4780.dtsi | 40 > ++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi > b/arch/mips/boot/dts/ingenic/jz4780.dtsi > index 9e34f433b9b58..98cc3360bbbb9 100644 > --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi > +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi > @@ -424,6 +424,46 @@ i2c4: i2c@10054000 { > status = "disabled"; > }; > > + hdmi: hdmi@10180000 { > + compatible = "ingenic,jz4780-dw-hdmi"; > + reg = <0x10180000 0x8000>; > + reg-io-width = <4>; > + > + clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>; > + clock-names = "iahb", "isfr"; > + > + interrupt-parent = <&intc>; > + interrupts = <3>; > + > + status = "disabled"; > + }; > + > + lcdc0: lcdc0@13050000 { > + compatible = "ingenic,jz4780-lcd"; > + reg = <0x13050000 0x1800>; > + > + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; > + clock-names = "lcd", "lcd_pclk"; > + > + interrupt-parent = <&intc>; > + interrupts = <31>; > + > + status = "disabled"; > + }; > + > + lcdc1: lcdc1@130a0000 { > + compatible = "ingenic,jz4780-lcd"; > + reg = <0x130a0000 0x1800>; > + > + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; > + clock-names = "lcd", "lcd_pclk"; > + > + interrupt-parent = <&intc>; > + interrupts = <31>; You have the two LCD controllers wired to the same interrupt, that can't be right. From what I can read in the PM the LCD1 IRQ is number 23. Cheers, -Paul > + > + status = "disabled"; > + }; > + > nemc: nemc@13410000 { > compatible = "ingenic,jz4780-nemc", "simple-mfd"; > reg = <0x13410000 0x10000>; > -- > 2.33.0 >
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 9e34f433b9b58..98cc3360bbbb9 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -424,6 +424,46 @@ i2c4: i2c@10054000 { status = "disabled"; }; + hdmi: hdmi@10180000 { + compatible = "ingenic,jz4780-dw-hdmi"; + reg = <0x10180000 0x8000>; + reg-io-width = <4>; + + clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>; + clock-names = "iahb", "isfr"; + + interrupt-parent = <&intc>; + interrupts = <3>; + + status = "disabled"; + }; + + lcdc0: lcdc0@13050000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x13050000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + + lcdc1: lcdc1@130a0000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x130a0000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + nemc: nemc@13410000 { compatible = "ingenic,jz4780-nemc", "simple-mfd"; reg = <0x13410000 0x10000>;