@@ -1141,7 +1141,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
struct drm_device *drm = dev_get_drvdata(master);
struct vc4_crtc *vc4_crtc;
struct drm_crtc *crtc;
- struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp;
+ struct drm_plane *primary_plane, *destroy_plane, *temp;
const struct of_device_id *match;
int ret, i;
@@ -1189,34 +1189,9 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
*/
drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
- /* Set up some arbitrary number of planes. We're not limited
- * by a set number of physical registers, just the space in
- * the HVS (16k) and how small an plane can be (28 bytes).
- * However, each plane we set up takes up some memory, and
- * increases the cost of looping over planes, which atomic
- * modesetting does quite a bit. As a result, we pick a
- * modest number of planes to expose, that should hopefully
- * still cover any sane usecase.
- */
- for (i = 0; i < 8; i++) {
- struct drm_plane *plane =
- vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
-
- if (IS_ERR(plane))
- continue;
-
- plane->possible_crtcs = drm_crtc_mask(crtc);
- }
-
- /* Set up the legacy cursor after overlay initialization,
- * since we overlay planes on the CRTC in the order they were
- * initialized.
- */
- cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
- if (!IS_ERR(cursor_plane)) {
- cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
- crtc->cursor = cursor_plane;
- }
+ ret = vc4_plane_create_additional_planes(drm, crtc);
+ if (ret)
+ goto err_destroy_planes;
vc4_crtc_get_cob_allocation(vc4_crtc);
@@ -848,6 +848,8 @@ int vc4_kms_load(struct drm_device *dev);
/* vc4_plane.c */
struct drm_plane *vc4_plane_init(struct drm_device *dev,
enum drm_plane_type type);
+int vc4_plane_create_additional_planes(struct drm_device *dev,
+ struct drm_crtc *crtc);
u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist);
u32 vc4_plane_dlist_size(const struct drm_plane_state *state);
void vc4_plane_async_set_fb(struct drm_plane *plane,
@@ -1371,3 +1371,41 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
return plane;
}
+
+int vc4_plane_create_additional_planes(struct drm_device *drm,
+ struct drm_crtc *crtc)
+{
+ struct drm_plane *cursor_plane;
+ unsigned int i;
+
+ /* Set up some arbitrary number of planes. We're not limited
+ * by a set number of physical registers, just the space in
+ * the HVS (16k) and how small an plane can be (28 bytes).
+ * However, each plane we set up takes up some memory, and
+ * increases the cost of looping over planes, which atomic
+ * modesetting does quite a bit. As a result, we pick a
+ * modest number of planes to expose, that should hopefully
+ * still cover any sane usecase.
+ */
+ for (i = 0; i < 8; i++) {
+ struct drm_plane *plane =
+ vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
+
+ if (IS_ERR(plane))
+ continue;
+
+ plane->possible_crtcs = drm_crtc_mask(crtc);
+ }
+
+ /* Set up the legacy cursor after overlay initialization,
+ * since we overlay planes on the CRTC in the order they were
+ * initialized.
+ */
+ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
+ if (!IS_ERR(cursor_plane)) {
+ cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
+ crtc->cursor = cursor_plane;
+ }
+
+ return 0;
+}
The planes so far were created as part of the CRTC binding code with each planes created associated only to one CRTC. However, the hardware in the vc4 doesn't really have such constraint and can be used with any CRTC. In order to rework this, let's first move the overlay and cursor planes creation to a function of its own. Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/gpu/drm/vc4/vc4_crtc.c | 33 +++--------------------------- drivers/gpu/drm/vc4/vc4_drv.h | 2 ++- drivers/gpu/drm/vc4/vc4_plane.c | 38 ++++++++++++++++++++++++++++++++++- 3 files changed, 44 insertions(+), 29 deletions(-)