| Message ID | ec1993368dba4e6ec1c72faa9c7bb25cf8ca95d3.1561482165.git.agx@sigxcpu.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panel: jh057n0090: Add regulators and drop magic value in init | expand |
On Tue, Jun 25, 2019 at 07:05:17PM +0200, Guido Günther wrote: > 0xBF isn't in any ST7703 data sheet so mark it as unknown. This avoids > confusion on whether there is a missing command in that > dsi_generic_write_seq() call. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > --- > drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > index 6dcb692c4701..b8a069055fbc 100644 > --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > @@ -33,6 +33,7 @@ > #define ST7703_CMD_SETEXTC 0xB9 > #define ST7703_CMD_SETMIPI 0xBA > #define ST7703_CMD_SETVDC 0xBC > +#define ST7703_CMD_UNKNOWN0 0xBF > #define ST7703_CMD_SETSCR 0xC0 > #define ST7703_CMD_SETPOWER 0xC1 > #define ST7703_CMD_SETPANEL 0xCC > @@ -94,7 +95,7 @@ static int jh057n_init_sequence(struct jh057n *ctx) > msleep(20); > > dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); > - dsi_generic_write_seq(dsi, 0xBF, 0x02, 0x11, 0x00); > + dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00); > dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, > 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, > 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, > -- > 2.20.1
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c index 6dcb692c4701..b8a069055fbc 100644 --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c @@ -33,6 +33,7 @@ #define ST7703_CMD_SETEXTC 0xB9 #define ST7703_CMD_SETMIPI 0xBA #define ST7703_CMD_SETVDC 0xBC +#define ST7703_CMD_UNKNOWN0 0xBF #define ST7703_CMD_SETSCR 0xC0 #define ST7703_CMD_SETPOWER 0xC1 #define ST7703_CMD_SETPANEL 0xCC @@ -94,7 +95,7 @@ static int jh057n_init_sequence(struct jh057n *ctx) msleep(20); dsi_generic_write_seq(dsi, ST7703_CMD_SETVCOM, 0x3F, 0x3F); - dsi_generic_write_seq(dsi, 0xBF, 0x02, 0x11, 0x00); + dsi_generic_write_seq(dsi, ST7703_CMD_UNKNOWN0, 0x02, 0x11, 0x00); dsi_generic_write_seq(dsi, ST7703_CMD_SETGIP1, 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
0xBF isn't in any ST7703 data sheet so mark it as unknown. This avoids confusion on whether there is a missing command in that dsi_generic_write_seq() call. Signed-off-by: Guido Günther <agx@sigxcpu.org> --- drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)