Message ID | f22f53c569ee2722d909c4673b5c7cd43628bfd6.1600072407.git.jsarha@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/tilcdc: Couple of minor feature improvements | expand |
Hi Jyri, Thank you for the patch. On Mon, Sep 14, 2020 at 11:34:49AM +0300, Jyri Sarha wrote: > END_OF_FRAME interrupts have been enabled all the time since the > beginning of this driver. It is about time to add this feature. > > Signed-off-by: Jyri Sarha <jsarha@ti.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +++++++++++++++++++++++++--- > 1 file changed, 33 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > index 1856962411c7..29f263e1975a 100644 > --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c > @@ -147,12 +147,9 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev) > tilcdc_set(dev, LCDC_RASTER_CTRL_REG, > LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA | > LCDC_V1_UNDERFLOW_INT_ENA); > - tilcdc_set(dev, LCDC_DMA_CTRL_REG, > - LCDC_V1_END_OF_FRAME_INT_ENA); > } else { > tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, > LCDC_V2_UNDERFLOW_INT_ENA | > - LCDC_V2_END_OF_FRAME0_INT_ENA | > LCDC_FRAME_DONE | LCDC_SYNC_LOST); > } > } > @@ -678,11 +675,44 @@ static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc, > > static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc) > { > + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); > + struct drm_device *dev = crtc->dev; > + struct tilcdc_drm_private *priv = dev->dev_private; > + unsigned long flags; > + > + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); > + > + tilcdc_clear_irqstatus(dev, LCDC_END_OF_FRAME0); > + > + if (priv->rev == 1) > + tilcdc_set(dev, LCDC_DMA_CTRL_REG, > + LCDC_V1_END_OF_FRAME_INT_ENA); > + else > + tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, > + LCDC_V2_END_OF_FRAME0_INT_ENA); > + > + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); > + > return 0; > } > > static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc) > { > + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); > + struct drm_device *dev = crtc->dev; > + struct tilcdc_drm_private *priv = dev->dev_private; > + unsigned long flags; > + > + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); > + > + if (priv->rev == 1) > + tilcdc_clear(dev, LCDC_DMA_CTRL_REG, > + LCDC_V1_END_OF_FRAME_INT_ENA); > + else > + tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG, > + LCDC_V2_END_OF_FRAME0_INT_ENA); > + > + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); > } > > static void tilcdc_crtc_reset(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 1856962411c7..29f263e1975a 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -147,12 +147,9 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev) tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA | LCDC_V1_UNDERFLOW_INT_ENA); - tilcdc_set(dev, LCDC_DMA_CTRL_REG, - LCDC_V1_END_OF_FRAME_INT_ENA); } else { tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA | - LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_FRAME_DONE | LCDC_SYNC_LOST); } } @@ -678,11 +675,44 @@ static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc, static int tilcdc_crtc_enable_vblank(struct drm_crtc *crtc) { + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; + unsigned long flags; + + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); + + tilcdc_clear_irqstatus(dev, LCDC_END_OF_FRAME0); + + if (priv->rev == 1) + tilcdc_set(dev, LCDC_DMA_CTRL_REG, + LCDC_V1_END_OF_FRAME_INT_ENA); + else + tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, + LCDC_V2_END_OF_FRAME0_INT_ENA); + + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); + return 0; } static void tilcdc_crtc_disable_vblank(struct drm_crtc *crtc) { + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; + unsigned long flags; + + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); + + if (priv->rev == 1) + tilcdc_clear(dev, LCDC_DMA_CTRL_REG, + LCDC_V1_END_OF_FRAME_INT_ENA); + else + tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG, + LCDC_V2_END_OF_FRAME0_INT_ENA); + + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); } static void tilcdc_crtc_reset(struct drm_crtc *crtc)
END_OF_FRAME interrupts have been enabled all the time since the beginning of this driver. It is about time to add this feature. Signed-off-by: Jyri Sarha <jsarha@ti.com> --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 36 +++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-)