From patchwork Thu May 18 20:48:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jyri Sarha X-Patchwork-Id: 9735251 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D6DA1601A1 for ; Thu, 18 May 2017 20:49:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C308928830 for ; Thu, 18 May 2017 20:49:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B60DE288CF; Thu, 18 May 2017 20:49:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4422728830 for ; Thu, 18 May 2017 20:49:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 869026E176; Thu, 18 May 2017 20:49:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF7FC6E176 for ; Thu, 18 May 2017 20:49:43 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4IKn7ix025022; Thu, 18 May 2017 15:49:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1495140547; bh=6rzoL059oqZopfxKWrZ3kPqI8SRGFUvL/w4kuaNlEtQ=; h=From:To:CC:Subject:Date; b=ViKwRjrtLYUO9DUWLQ3naXQrWj8qO4e53eA2sw9eian9p4VAIoRj/DwYNcYmsd9aj utq6gsXRP3nMnc2wit6BfQOLd3dqVK2+EdyIsrUd2mFSIQeADizpBzWJ8wjmTzGyIL r5+fdjknFKFmgC9qjrxNKU0x5oKcNJW9PQpqP+uk= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4IKn2f0002640; Thu, 18 May 2017 15:49:02 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Thu, 18 May 2017 15:49:02 -0500 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4IKn051020697; Thu, 18 May 2017 15:49:01 -0500 From: Jyri Sarha To: Subject: [PATCH v2] drm/omap: Implement CTM property for CRTC using OVL managers CPR matrix Date: Thu, 18 May 2017 23:48:57 +0300 Message-ID: X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Cc: tomi.valkeinen@ti.com, Jyri Sarha , laurent.pinchart@ideasonboard.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Implement CTM color management property for OMAP CRTC using DSS overlay manager's Color Phase Rotation matrix. The CPR matrix does not exactly match the CTM property documentation. On DSS the CPR matrix is applied after gamma table look up. However, it seems stupid to add a custom property just for that. Signed-off-by: Jyri Sarha --- There was an earlier version of this patch as a part of one series here: https://lists.freedesktop.org/archives/dri-devel/2017-March/136811.html Changes since that version: - Fix commit message: CPR is applied after gamma table, not before (this makes me wonder if we should call our gamma tablem degamma) - Correctly convert form signed magnitude format of CTM blob - Remove redundant size check for CTM blob drivers/gpu/drm/omapdrm/omap_crtc.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index dccd037..24a2d14 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -312,6 +312,32 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) DBG("%s: apply done", omap_crtc->name); } +static s16 omap_crtc_S31_32_to_s2_8(s64 coef) +{ + uint64_t sign_bit = 1ULL << 63; + uint64_t cbits = (uint64_t) coef; + s16 ret = clamp_val(((cbits & ~sign_bit) >> 24), 0, 0x1FF); + + if (cbits & sign_bit) + ret = -ret; + + return ret; +} + +static void omap_crtc_cpr_coefs_from_ctm(const struct drm_color_ctm *ctm, + struct omap_dss_cpr_coefs *cpr) +{ + cpr->rr = omap_crtc_S31_32_to_s2_8(ctm->matrix[0]); + cpr->rg = omap_crtc_S31_32_to_s2_8(ctm->matrix[1]); + cpr->rb = omap_crtc_S31_32_to_s2_8(ctm->matrix[2]); + cpr->gr = omap_crtc_S31_32_to_s2_8(ctm->matrix[3]); + cpr->gg = omap_crtc_S31_32_to_s2_8(ctm->matrix[4]); + cpr->gb = omap_crtc_S31_32_to_s2_8(ctm->matrix[5]); + cpr->br = omap_crtc_S31_32_to_s2_8(ctm->matrix[6]); + cpr->bg = omap_crtc_S31_32_to_s2_8(ctm->matrix[7]); + cpr->bb = omap_crtc_S31_32_to_s2_8(ctm->matrix[8]); +} + static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) { struct omap_drm_private *priv = crtc->dev->dev_private; @@ -325,6 +351,14 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) info.partial_alpha_enabled = false; info.cpr_enable = false; + if (crtc->state->ctm) { + struct drm_color_ctm *ctm = + (struct drm_color_ctm *) crtc->state->ctm->data; + + info.cpr_enable = true; + omap_crtc_cpr_coefs_from_ctm(ctm, &info.cpr_coefs); + } + priv->dispc_ops->mgr_setup(omap_crtc->channel, &info); } @@ -636,7 +670,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, if (priv->dispc_ops->mgr_gamma_size(channel)) { uint gamma_lut_size = 256; - drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); + drm_crtc_enable_color_mgmt(crtc, 0, true, gamma_lut_size); drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); }