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[31.10.206.125]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-35579f96519sm9349394f8f.26.2024.05.27.09.04.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 May 2024 09:04:11 -0700 (PDT) From: max.oss.09@gmail.com To: Max Krummenacher Cc: Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 0/2] arm64: dts: freescale: imx8m{m|p}: don't limit i2c2 max. clock Date: Mon, 27 May 2024 18:03:44 +0200 Message-ID: <20240527160359.1965512-1-max.oss.09@gmail.com> X-Mailer: git-send-email 2.42.0 Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Max Krummenacher This sets the I2C clock frequency to something people expect it to be by default. For I2C DDC we do want to lower the I2C clock to have more reliable communication. However that should be done where the I2C bus is assigned to a HDMI DDC, not as the default. Max Krummenacher (2): arm64: dts: freescale: imx8mm-verdin: don't limit i2c2 max. clock arm64: dts: freescale: imx8mp-verdin: don't limit i2c2 max. clock arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-)