mbox series

[0/5] arm64: dts: imx: Add LPSPI alias for I.MX8ULP/8QXP/8QM/8DXL/93

Message ID 20241018034532.2552325-1-carlos.song@nxp.com (mailing list archive)
Headers show
Series arm64: dts: imx: Add LPSPI alias for I.MX8ULP/8QXP/8QM/8DXL/93 | expand

Message

Carlos Song Oct. 18, 2024, 3:45 a.m. UTC 
From: Carlos Song <carlos.song@nxp.com>

Now there is no alias for LPSPI on I.MX8ULP/8QXP/8QM/8DXL/93.
So spidevB.C index B will be automatically allocated by kernel
incrementally from zero according to the order of registering
spi controller. In this case, it is hard to determine spidevB.C
is spi interface of device C on which LPSPI bus. It will cause
confusion when operate spi devices in userspace.

For example, in I.MX93, When LPSPI3 and LPSPI5 are enabled
without alais:

:~# ls /dev/spidev*
/dev/spidev0.0  /dev/spidev1.0

After LPSPI alais is applied, fixedly B is the LPSPI index and
C is the spi device index in spidevB.C. They are the pleasant
spidev names. Directly spidev2.0 is the device0 at LPSPI3 bus
and spidev4.0 is the device0 at LPSPI5 bus:

:~# ls /dev/spidev*
/dev/spidev2.0  /dev/spidev4.0

Signed-off-by: Carlos Song <carlos.song@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Carlos Song (5):
  arm64: dts: imx8qxp: Add LPSPI alias
  arm64: dts: imx8qm: Add LPSPI alias
  arm64: dts: imx8dxl: Add LPSPI alias
  arm64: dts: imx8ulp: Add LPSPI alias
  arm64: dts: imx93: Add LPSPI alias

 arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 4 ++++
 arch/arm64/boot/dts/freescale/imx8qm.dtsi  | 4 ++++
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 ++++
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 2 ++
 arch/arm64/boot/dts/freescale/imx93.dtsi   | 8 ++++++++
 5 files changed, 22 insertions(+)

Comments

Shawn Guo Nov. 1, 2024, 8:15 a.m. UTC | #1 
On Fri, Oct 18, 2024 at 11:45:27AM +0800, carlos.song@nxp.com wrote:
> From: Carlos Song <carlos.song@nxp.com>
> 
> Now there is no alias for LPSPI on I.MX8ULP/8QXP/8QM/8DXL/93.
> So spidevB.C index B will be automatically allocated by kernel
> incrementally from zero according to the order of registering
> spi controller. In this case, it is hard to determine spidevB.C
> is spi interface of device C on which LPSPI bus. It will cause
> confusion when operate spi devices in userspace.
> 
> For example, in I.MX93, When LPSPI3 and LPSPI5 are enabled
> without alais:
> 
> :~# ls /dev/spidev*
> /dev/spidev0.0  /dev/spidev1.0
> 
> After LPSPI alais is applied, fixedly B is the LPSPI index and
> C is the spi device index in spidevB.C. They are the pleasant
> spidev names. Directly spidev2.0 is the device0 at LPSPI3 bus
> and spidev4.0 is the device0 at LPSPI5 bus:
> 
> :~# ls /dev/spidev*
> /dev/spidev2.0  /dev/spidev4.0
> 
> Signed-off-by: Carlos Song <carlos.song@nxp.com>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> 
> Carlos Song (5):
>   arm64: dts: imx8qxp: Add LPSPI alias
>   arm64: dts: imx8qm: Add LPSPI alias
>   arm64: dts: imx8dxl: Add LPSPI alias
>   arm64: dts: imx8ulp: Add LPSPI alias
>   arm64: dts: imx93: Add LPSPI alias

Applied all, thanks!