From patchwork Sat May 4 00:49:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13653717 Received: from EUR02-VI1-obe.outbound.protection.outlook.com (mail-vi1eur02on2083.outbound.protection.outlook.com [40.107.241.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A948123768 for ; Sat, 4 May 2024 00:42:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.241.83 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714783350; cv=fail; b=Uz4zQx6e9ax5oC0j581FbPaTwuK5W+a9q5JdEi1TIGhCvMZ14jqxUkzIwtglOsk+SKOJaevQDX/9INiQ8KKNBpnR9yqqJViGvk373hlGYs2ijPxWV+iiOL1qtdn0yAMyqPjoLfmZTOpC8dZSGHub+Z5UjWs+Y76unhHMKW13lbs= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714783350; c=relaxed/simple; bh=ol6T1q1Aq60j4vSh/rwMrCMDOxf8jPJ9kodS4MqsQqw=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=GXz17N4VdmSHie5J1lg8WnD+xSdcwixzYQYLETpJHTWR32x6k/ekh97/a999zeZcImNBMp27DD0ict6xoHibcTF1nPZ2CjAOdv28yJ9wvu9tnqvlKjAgKlr/AE0eTfA2fnNX8W8NT2/uJSHLtQcn+ARuMsoYGkDbNWu14CS+OzA= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (1024-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=frZD/TGi; arc=fail smtp.client-ip=40.107.241.83 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="frZD/TGi" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CEM4Cr6Bc7i/vGY7ZKza3LgfoFBp0QOLd1JC74EjjLLRokTAuYCTrw+srckPmdIJd5uS83ne63aCwKvbwUeS1H8lEmtnm0SU/Qhvylws1w8R+79/aPxW27RwGFvTWXJJWUxlVTqTLdl2v70iavVgyWBv6xrzxJXTTrJk/enwhd45wLkDbdVx+GKbDoQ5ZByrjt8L5Ag5gErGYv5CT++ZcRcqT6n/eEaanNXWJVDj42Aq3tmgHIUko/AoXc0mUN8Ff+VqOSn7ZRMCwK1C1CsG0nitOFihwl7yKcxhs8OrmvcACFFVhtGAFtAShsWgxU9nLNv6okor/4hJEY2m/fmSSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=haZ6P9kChEQ6LyhfR+Vw1ypeLFvLrcIo+nuKLMbxpNM=; b=T5GXRI6eNaKKLGeS9WZkc8Tk4t7r5n1dli8RLbZoFm52pyrhs96VCz/we68qbD2qRU6D6g5zWXK2LoYZU8gjBBkJ7VRgr5ElhIjec/t/3YC5sdwYj1aerZyo19OGyIanc7Q6CKT67Z1t5Ny5jbsg7Pzlz7eMtXpKp3tVJk233ayEVQcDIx0OGLl9w4gU7zJ9CdjJeOLcKxdzPHMlk7vdTthUVtsqrl1THebwbTZjlJ2pL9rpMVOgNhXuBM8o+c9FfZYmLh/onHDsPmCfu+K+sgNdF4Pz1mWXy4BOsqJJI1XjP1In8kNFdTT0Ik4UU0Gt7ZvDnWcHhr7k1dyRI9ESHQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=haZ6P9kChEQ6LyhfR+Vw1ypeLFvLrcIo+nuKLMbxpNM=; b=frZD/TGiuzwiq3aN0xaU0zjbB3ugSZ31ODIeHGWqZT7GQ95vXI3uUD61D9fmH/NtpOJpyZBnIFrdMGpS3vM7EBHiQt38hxomx5ZVSIhd8NIax1XUge+LhHpHYLgUxuTop2Ans0QcYgCBmTP02MwwHPSf/o3JLPgryIy3AUnyz18= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) by PA4PR04MB7726.eurprd04.prod.outlook.com (2603:10a6:102:ea::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7544.29; Sat, 4 May 2024 00:42:25 +0000 Received: from DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::d30b:44e7:e78e:662d]) by DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::d30b:44e7:e78e:662d%4]) with mapi id 15.20.7544.029; Sat, 4 May 2024 00:42:25 +0000 From: "Peng Fan (OSS)" Date: Sat, 04 May 2024 08:49:08 +0800 Subject: [PATCH 15/18] clk: imx: imx8qxp: Add clock muxes for MIPI and PHY ref clocks Message-Id: <20240504-imx-clk-v1-15-f7915489d58d@nxp.com> References: <20240504-imx-clk-v1-0-f7915489d58d@nxp.com> In-Reply-To: <20240504-imx-clk-v1-0-f7915489d58d@nxp.com> To: Abel Vesa , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Jacky Bai , Ye Li , Dong Aisheng Cc: linux-clk@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Abel Vesa , Peng Fan , "Oliver F. Brown" , Robert Chiras X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1714783747; l=4040; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=xxTNiTDPAbopWXYDXxGIv8y1Vyhx+iZ9rQ5/X96xIkk=; b=JJSHcmBw8XDB5MX/ios8PYv/EvtlP3n4PTHts5VwJMwJ97hDXOl7s/xqcSsk1r8EKnW7jYjcs hePASN+FnMLDd5+ki7FywzF6SSf3/U6mn6WU0l0moyrRS7yfZznil0j X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI1PR02CA0055.apcprd02.prod.outlook.com (2603:1096:4:1f5::16) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|PA4PR04MB7726:EE_ X-MS-Office365-Filtering-Correlation-Id: de741c9a-ba1c-4e14-b4be-08dc6bd31140 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|7416005|52116005|366007|1800799015|376005|921011|38350700005; X-Microsoft-Antispam-Message-Info: =?utf-8?q?7WZAJ3k3C+Rpl9DCUGc/hFlTmOejQjZ?= =?utf-8?q?FVGDAdLytTPzmLwn8smgKV6iDDAClqCcLqC0DmFT1pH8gRzgrhIJ+T8fec0pif2/q?= =?utf-8?q?njtjfwkDkVF6S9mDQdjvwXGsQPTsEcBhyGva0cnz3yyWqQrHwxsiFuTk8wruNWh6n?= =?utf-8?q?Uh6QbN0Mw2+L9fdnNJKh8jGiIZJdEFe2cfGQbjc7SbjhEl1JUowGbz9eARW9vkdAY?= =?utf-8?q?enDDPxwNOkOFrDRwyXqQWxQupIBAhfyEj3GY4T7eJEU/JEeRWNFDkd8HZFjEim/9J?= =?utf-8?q?ic5fCmZ1DsY/MVWHKcuh1AV1Vk1J09ke/MPyHc/X61OEnblKeBgllXf6c8T3p3fEG?= =?utf-8?q?TKVtS+GASxBKzpiS5TuAwVjSUQRi5fZCoNofryS71CYpoAma3izWFUR3v+xbBh2MD?= =?utf-8?q?1kOLnwnzl77RYcN3twiFg9eBLK/6C85b9uVJogOmWMkZD8KDGhn5fmJHT9tNxeo6j?= =?utf-8?q?wf+uM4zbt0JNz5DTEv/XQmQV7gVs3qYFdqjZ3J/zhN8osHg1/1ZO1j+8Vwuifa/oh?= =?utf-8?q?vTGP6cbkZv57bfzlnUg52DBZyxhDHUef2VRTJNAaDUx3muQML/V759oRQeunpBEW/?= =?utf-8?q?0Atg9tkkPjXs9piqM4aj4ZmX6y4Oxy6yroE+ZceokIw4ei3Orp2WFuewRJ4Ikf9T5?= =?utf-8?q?p3vKoPUEsE+h8usRLOAzMNfYfh0QI7KuPE0AYDRqN9aFHanufye/R6xLpD31keWCD?= =?utf-8?q?znD28pUNTtYHUhU7VJl0FIru8Kn6KQFXIshlwpfLDO7Wy9HLQmQh3TXhD0TQi36Lr?= =?utf-8?q?QDZnIniwipEEbHZ5mxMuliU4XlTe3JZshOBR46hEfw3WUzTGg/d19C5fyuwgwrVNe?= =?utf-8?q?19R3XJB918rEdwDES22Lah+d2mL1w2CFBe2gPSEkiMg3aXSx+JDdCaf9VPtNifw09?= =?utf-8?q?ci3Z6ELSC0BYaqxDtDRK4XaqY/fFuV69UG8JukNoSW1bLKoHhrfN2dJsVQKZtbjwA?= =?utf-8?q?Ey2bAtzNJZfRgzfpZ13aD9wphFLRqDmS5WiKRKDL8P6MsDe1L24DYRMSMZl3/Ym8y?= =?utf-8?q?gWZ+L/UkehNJ/1N9V3y2baEc9skmKONIJ1oIVUqrLr+xGCK7XnACIvPox3hl0ZPZm?= =?utf-8?q?9KSDc1Q16f+GD4Jd70eU2pOZLIf6PmU5K2bqxoufHN3XwRoUkIm7nYpj2HnEqvt+z?= =?utf-8?q?uH2Oy9hTJiQ6zKqTDDlkSIlXUWoCrQ6U5oImC3FLIUyFsrV9NthiHNqjknmZDWxgn?= =?utf-8?q?KLu7JmDmScZCLhWYDMAuIPRQVus2oZ6cUNuk3P6Aih3fE/GwNjlWvePmITXp2Sqav?= =?utf-8?q?/GkuDpfpp/j6NWZSPvxijlcwVMt7M6PpG7jK62QVhP5wSLIYxjB1b2gU=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DU0PR04MB9417.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(7416005)(52116005)(366007)(1800799015)(376005)(921011)(38350700005);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?UYySMzeIfFkZwLphG2gyDJOFDp+M?= =?utf-8?q?nrAIEHjPvBIo+1NR2s21bmyAfJfqAidCCJ9AGmOSpAzse6290YYqF3RuycxpirVie?= =?utf-8?q?bqyfrV4zemZTJ94BE2phofT/qxiPDpuUnqok6JRrH7jjCzf/XpAnju5iWj3KjFfXg?= =?utf-8?q?Su6/Ass28JkT5lzWOYbTZCoPllT2cg1EeEXyJ4I1cu7Fv87GV8iKaSsR20OV6GeED?= =?utf-8?q?o61cLIIhYJqXC6eCNwk6TUb4TecWGuzPlmFTjVimnC+hVoPdsE+RYEphgEbOlZJTF?= =?utf-8?q?kWMdpOlJ6IELzhonsaImqKRWzjBHP73UvNrXuZSRtRuk8DVx/zNKwWVQ5mKAkXanh?= =?utf-8?q?ix6ZN+boH8neUPBaHcD8JRFhhQhxmRDmbsznbh+gTIcyQ6jGxzJ5L86Tv32kCC1pv?= =?utf-8?q?KOzxHfG5Ea/6J2hsaf8BoRImvtEm4P/pP1YFG04FCUQsFe8gB6neGnbm5+5HJ1fbm?= =?utf-8?q?cBDvp1ozAJFgZcyy2psOTMKvHj/3869kwzb4XgmCcZ82cuBLXGA5hIBS88h2WZL+P?= =?utf-8?q?3F5QqdYI4V/6c55+NJVexe8rw/RhS5LNBNBWajUFkt8jB2R49vJO5aHKAl5U6quqt?= =?utf-8?q?SRZTJ5FFtXexiXxeuFHayCNEy/FPiHooRJYBFoL5a4TwoJaM4P/YiEH9jlXr6dljw?= =?utf-8?q?Dq6QFOTmNZeqL2dxeVGca+lSQ0NCEq29bCWkF9x96lJ/zySzNyKMwY2osXsto3cxK?= =?utf-8?q?woEZNiKjYWTN07iTkMSU+8hqD+0FR6A1sL5xS+gRnr7QdsF0mnyYCf0rt0njIcYQK?= =?utf-8?q?UwBd1sXuxlVLA6jZvyvybfCSCGfqgKeQZ9E4Z8q6+0ycdccbjlwCJBlMpRs7r+aPX?= =?utf-8?q?Kg5Q/lWulZO0M/pIuvbP2FzU77iUwzMQy0QEMJl6a24LdWITHN6pfu+P8tjmZIovx?= =?utf-8?q?F8bOygMQibdLh9Emp8piVzjhDtHW/D70vuUaIMJMuUDrAPZ9CMxsE9EmLiKQBNEv2?= =?utf-8?q?4+SOm+Os89QdFXwIizG89NP7pP/GzW2EJs3zHBf0H8W+Utng4MznUTCQa7rUkkn5T?= =?utf-8?q?nWqPJbHr7HOlJTY8j/dGs5Z5N6bF7AjM34T79FZZsGqVwPnZ4y/x1m9MUqFZRLWhr?= =?utf-8?q?LQfnA3znZOPmi1OYTKOoZ0SWOCqIbn0vR6ROm5HxA7zRPqDC8ixUEE13+qEJp0Xip?= =?utf-8?q?oy4zgkHqT+D2s3XBsobhp/qQI3XJDs/+rfP4NOtPDHCP/B/mh5ldnFdxt+q+gUjS2?= =?utf-8?q?38Bmnkif4Pe9K1t/Tq+zBfVBnwXDDHWRCwDTFk1noQHEDv2WWNGHzP2V59/QMXAOq?= =?utf-8?q?f87R4BuWB2h4t2CBBfFfCfMyBHvne66gPTFcAyjH4gtt3CMcs52flhzi4k1XF+Log?= =?utf-8?q?6ES5LI/fc3et1BUaqDWJhcM0TgQXqg+LQM02qw94L5Hy1E/W5syA/agP2cEHPaiRM?= =?utf-8?q?bbbkhe1fEY5S+mdgept+pQ0C9KpnKzkwFmAbDD3P7SqUEc7m87TdFamEArBKN/oy5?= =?utf-8?q?UzNZt9vtvFYa09GGNS0AcCofmjFYvjpdtQ1PZ3wa9IRKb2Hwyv9rWovnKxOZv8iUU?= =?utf-8?q?2zdmDDM4vqP1?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: de741c9a-ba1c-4e14-b4be-08dc6bd31140 X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2024 00:42:25.2170 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jGFJ8EkBmYcvRM4GC08jopv3Ene8fvFiEhzeFdyVX1vie9WnWBa56OXB6J0BABJfUoEIVV4pkTSXb0V9nJJBAA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB7726 From: "Oliver F. Brown" The MIPI Pixel and PHY Reference can use the bypass clock as a source. The MIPI bypass clock is the Pixel clock from the Display controller via the pixel link. Using the pixel clock for the PHY reference allows the MIPI bit clock match the pixel rate exactly. The MIPI pixel clock is currently set to be source from the bypass clock in the SCFW. This patch allows the pixel clock parent to be set by the kernel in the event that the SCFW default clock parent may change in the future. Signed-off-by: Oliver F. Brown Signed-off-by: Robert Chiras Signed-off-by: Peng Fan --- drivers/clk/imx/clk-imx8qxp.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index a0654edaae83..fe6509be6ce9 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -90,6 +90,22 @@ static const char * const mipi_sels[] = { "clk_dummy", }; +static const char * const mipi0_phy_sels[] = { + "clk_dummy", + "clk_dummy", + "mipi_pll_div2_clk", + "clk_dummy", + "mipi0_bypass_clk", +}; + +static const char * const mipi1_phy_sels[] = { + "clk_dummy", + "clk_dummy", + "mipi_pll_div2_clk", + "clk_dummy", + "mipi1_bypass_clk", +}; + static const char * const lcd_sels[] = { "clk_dummy", "clk_dummy", @@ -222,25 +238,25 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) /* MIPI-LVDS SS */ imx_clk_scu("mipi0_bypass_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_BYPASS); - imx_clk_scu("mipi0_pixel_clk", IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PER); + imx_clk_scu2("mipi0_pixel_clk", mipi0_phy_sels, ARRAY_SIZE(mipi0_phy_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PER); imx_clk_scu("lvds0_bypass_clk", IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_BYPASS); imx_clk_scu2("lvds0_pixel_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC2); imx_clk_scu2("lvds0_phy_clk", lvds0_sels, ARRAY_SIZE(lvds0_sels), IMX_SC_R_LVDS_0, IMX_SC_PM_CLK_MISC3); imx_clk_scu2("mipi0_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_MST_BUS); imx_clk_scu2("mipi0_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_SLV_BUS); - imx_clk_scu2("mipi0_dsi_phy_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PHY); + imx_clk_scu2("mipi0_dsi_phy_clk", mipi0_phy_sels, ARRAY_SIZE(mipi0_phy_sels), IMX_SC_R_MIPI_0, IMX_SC_PM_CLK_PHY); imx_clk_scu("mipi0_i2c0_clk", IMX_SC_R_MIPI_0_I2C_0, IMX_SC_PM_CLK_MISC2); imx_clk_scu("mipi0_i2c1_clk", IMX_SC_R_MIPI_0_I2C_1, IMX_SC_PM_CLK_MISC2); imx_clk_scu("mipi0_pwm0_clk", IMX_SC_R_MIPI_0_PWM_0, IMX_SC_PM_CLK_PER); imx_clk_scu("mipi1_bypass_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_BYPASS); - imx_clk_scu("mipi1_pixel_clk", IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PER); + imx_clk_scu2("mipi1_pixel_clk", mipi1_phy_sels, ARRAY_SIZE(mipi1_phy_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PER); imx_clk_scu("lvds1_bypass_clk", IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_BYPASS); imx_clk_scu2("lvds1_pixel_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC2); imx_clk_scu2("lvds1_phy_clk", lvds1_sels, ARRAY_SIZE(lvds1_sels), IMX_SC_R_LVDS_1, IMX_SC_PM_CLK_MISC3); imx_clk_scu2("mipi1_dsi_tx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_MST_BUS); imx_clk_scu2("mipi1_dsi_rx_esc_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_SLV_BUS); - imx_clk_scu2("mipi1_dsi_phy_clk", mipi_sels, ARRAY_SIZE(mipi_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PHY); + imx_clk_scu2("mipi1_dsi_phy_clk", mipi1_phy_sels, ARRAY_SIZE(mipi1_phy_sels), IMX_SC_R_MIPI_1, IMX_SC_PM_CLK_PHY); imx_clk_scu("mipi1_i2c0_clk", IMX_SC_R_MIPI_1_I2C_0, IMX_SC_PM_CLK_MISC2); imx_clk_scu("mipi1_i2c1_clk", IMX_SC_R_MIPI_1_I2C_1, IMX_SC_PM_CLK_MISC2); imx_clk_scu("mipi1_pwm0_clk", IMX_SC_R_MIPI_1_PWM_0, IMX_SC_PM_CLK_PER);