diff mbox series

arm64: dts: imx8mp: Fix pgc vpu locations

Message ID 20240619101045.6317-1-aford173@gmail.com (mailing list archive)
State In Next, archived
Headers show
Series arm64: dts: imx8mp: Fix pgc vpu locations | expand

Commit Message

Adam Ford June 19, 2024, 10:10 a.m. UTC
The various pgv_vpu nodes have a mismatch between the value after
the @ symbol and what is referenced by 'reg' so reorder the nodes
to align.

Fixes: df680992dd62 ("arm64: dts: imx8mp: add vpu pgc nodes")
Suggested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Alexander Stein June 20, 2024, 11:37 a.m. UTC | #1
Hi Adam,

Am Mittwoch, 19. Juni 2024, 12:10:44 CEST schrieb Adam Ford:
> The various pgv_vpu nodes have a mismatch between the value after
> the @ symbol and what is referenced by 'reg' so reorder the nodes
> to align.
> 
> Fixes: df680992dd62 ("arm64: dts: imx8mp: add vpu pgc nodes")
> Suggested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Signed-off-by: Adam Ford <aford173@gmail.com>

Thanks for the patch.
Reviewd-by: Alexander Stein <alexander.stein@ew.tq-group.com>

> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 3576d2b89b43..ee0c864f27e8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -838,6 +838,12 @@ pgc_gpumix: power-domain@7 {
>  						assigned-clock-rates = <800000000>, <400000000>;
>  					};
>  
> +					pgc_vpumix: power-domain@8 {
> +						#power-domain-cells = <0>;
> +						reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
> +						clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
> +					};
> +
>  					pgc_gpu3d: power-domain@9 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
> @@ -853,6 +859,28 @@ pgc_mediamix: power-domain@10 {
>  							 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
>  					};
>  
> +					pgc_vpu_g1: power-domain@11 {
> +						#power-domain-cells = <0>;
> +						power-domains = <&pgc_vpumix>;
> +						reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
> +						clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> +					};
> +
> +					pgc_vpu_g2: power-domain@12 {
> +						#power-domain-cells = <0>;
> +						power-domains = <&pgc_vpumix>;
> +						reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
> +						clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> +
> +					};
> +
> +					pgc_vpu_vc8000e: power-domain@13 {
> +						#power-domain-cells = <0>;
> +						power-domains = <&pgc_vpumix>;
> +						reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
> +						clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> +					};
> +
>  					pgc_hdmimix: power-domain@14 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>;
> @@ -890,33 +918,6 @@ pgc_ispdwp: power-domain@18 {
>  						reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
>  						clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
>  					};
> -
> -					pgc_vpumix: power-domain@19 {
> -						#power-domain-cells = <0>;
> -						reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
> -						clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
> -					};
> -
> -					pgc_vpu_g1: power-domain@20 {
> -						#power-domain-cells = <0>;
> -						power-domains = <&pgc_vpumix>;
> -						reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
> -						clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
> -					};
> -
> -					pgc_vpu_g2: power-domain@21 {
> -						#power-domain-cells = <0>;
> -						power-domains = <&pgc_vpumix>;
> -						reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
> -						clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
> -					};
> -
> -					pgc_vpu_vc8000e: power-domain@22 {
> -						#power-domain-cells = <0>;
> -						power-domains = <&pgc_vpumix>;
> -						reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
> -						clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> -					};
>  				};
>  			};
>  		};
>
Shawn Guo June 27, 2024, 7:52 a.m. UTC | #2
On Wed, Jun 19, 2024 at 05:10:44AM -0500, Adam Ford wrote:
> The various pgv_vpu nodes have a mismatch between the value after
> the @ symbol and what is referenced by 'reg' so reorder the nodes
> to align.
> 
> Fixes: df680992dd62 ("arm64: dts: imx8mp: add vpu pgc nodes")
> Suggested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 3576d2b89b43..ee0c864f27e8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -838,6 +838,12 @@  pgc_gpumix: power-domain@7 {
 						assigned-clock-rates = <800000000>, <400000000>;
 					};
 
+					pgc_vpumix: power-domain@8 {
+						#power-domain-cells = <0>;
+						reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
+						clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
+					};
+
 					pgc_gpu3d: power-domain@9 {
 						#power-domain-cells = <0>;
 						reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
@@ -853,6 +859,28 @@  pgc_mediamix: power-domain@10 {
 							 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
 					};
 
+					pgc_vpu_g1: power-domain@11 {
+						#power-domain-cells = <0>;
+						power-domains = <&pgc_vpumix>;
+						reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
+						clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
+					};
+
+					pgc_vpu_g2: power-domain@12 {
+						#power-domain-cells = <0>;
+						power-domains = <&pgc_vpumix>;
+						reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
+						clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
+
+					};
+
+					pgc_vpu_vc8000e: power-domain@13 {
+						#power-domain-cells = <0>;
+						power-domains = <&pgc_vpumix>;
+						reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
+						clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
+					};
+
 					pgc_hdmimix: power-domain@14 {
 						#power-domain-cells = <0>;
 						reg = <IMX8MP_POWER_DOMAIN_HDMIMIX>;
@@ -890,33 +918,6 @@  pgc_ispdwp: power-domain@18 {
 						reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
 						clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>;
 					};
-
-					pgc_vpumix: power-domain@19 {
-						#power-domain-cells = <0>;
-						reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
-						clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
-					};
-
-					pgc_vpu_g1: power-domain@20 {
-						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
-						reg = <IMX8MP_POWER_DOMAIN_VPU_G1>;
-						clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>;
-					};
-
-					pgc_vpu_g2: power-domain@21 {
-						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
-						reg = <IMX8MP_POWER_DOMAIN_VPU_G2>;
-						clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>;
-					};
-
-					pgc_vpu_vc8000e: power-domain@22 {
-						#power-domain-cells = <0>;
-						power-domains = <&pgc_vpumix>;
-						reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
-						clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
-					};
 				};
 			};
 		};