diff mbox series

[5/7] arm64: dts: imx95-19x19-evk: add flexspi and child node

Message ID 20240627220001.692875-5-Frank.Li@nxp.com (mailing list archive)
State Superseded
Headers show
Series [1/7] arm64: dts: imx95: add edma[1..3] nodes | expand

Commit Message

Frank Li June 27, 2024, 9:59 p.m. UTC
Add flexspi and child flash node.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 .../boot/dts/freescale/imx95-19x19-evk.dts    | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

Comments

Peng Fan June 28, 2024, 12:58 a.m. UTC | #1
> Subject: [PATCH 5/7] arm64: dts: imx95-19x19-evk: add flexspi and
> child node
> 
> Add flexspi and child flash node.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  .../boot/dts/freescale/imx95-19x19-evk.dts    | 33
> +++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> index 660e623f4f964..ed8921d6217b8 100644
> --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
> @@ -163,6 +163,22 @@ sound-wm8962 {
>  	};
>  };
> 
> +&flexspi1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexspi1>;
> +	status = "okay";
> +
> +	flash@0 {
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		spi-max-frequency = <200000000>;
> +		spi-tx-bus-width = <8>;
> +		spi-rx-bus-width = <8>;
> +	};
> +};
> +
>  &lpi2c4 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
> @@ -336,6 +352,23 @@ &wdog3 {
>  };
> 
>  &scmi_iomuxc {
> +	pinctrl_flexspi1: flexspi1grp {
> +		fsl,pins = <
> +
> 	IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B
> 	0x3fe
> +			IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11
> 			0x3fe

This gpio should be in a standalone node and put under
flash@0 as 'reset-gpios'.

Regards,
Peng.

> +			IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK
> 			0x3fe
> +			IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS
> 			0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6
> 	0x3fe
> +
> 	IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7
> 	0x3fe
> +		>;
> +	};
> +
>  	pinctrl_hp: hpgrp {
>  		fsl,pins = <
>  			IMX95_PAD_GPIO_IO11__GPIO2_IO_BIT11
> 		0x31e
> --
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index 660e623f4f964..ed8921d6217b8 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -163,6 +163,22 @@  sound-wm8962 {
 	};
 };
 
+&flexspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexspi1>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <200000000>;
+		spi-tx-bus-width = <8>;
+		spi-rx-bus-width = <8>;
+	};
+};
+
 &lpi2c4 {
 	clock-frequency = <400000>;
 	pinctrl-names = "default";
@@ -336,6 +352,23 @@  &wdog3 {
 };
 
 &scmi_iomuxc {
+	pinctrl_flexspi1: flexspi1grp {
+		fsl,pins = <
+			IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B			0x3fe
+			IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11			0x3fe
+			IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK			0x3fe
+			IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS			0x3fe
+			IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0		0x3fe
+			IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1		0x3fe
+			IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2		0x3fe
+			IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3		0x3fe
+			IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4		0x3fe
+			IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5		0x3fe
+			IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6		0x3fe
+			IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7		0x3fe
+		>;
+	};
+
 	pinctrl_hp: hpgrp {
 		fsl,pins = <
 			IMX95_PAD_GPIO_IO11__GPIO2_IO_BIT11		0x31e