| Message ID | 20240708-pci2_upstream-v7-9-ac00b8174f89@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: imx6: Fix\rename\clean up and add lut information for imx95 | expand |
On Mon, Jul 08, 2024 at 01:08:13PM -0400, Frank Li wrote: > Invoke the common PHY API to configure mode, speed, and submode. While > these functions are optional in the PHY interface, they are necessary for > certain PHY drivers. Lack of support for these functions in a PHY driver > does not cause harm. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> I've mentioned an issue below which is unrelated to this patch, but please do fix it (in a separate patch). > --- > drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 57814a0cfab8c..c72c7a0b0e02d 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -29,6 +29,7 @@ > #include <linux/types.h> > #include <linux/interrupt.h> > #include <linux/reset.h> > +#include <linux/phy/pcie.h> > #include <linux/phy/phy.h> > #include <linux/pm_domain.h> > #include <linux/pm_runtime.h> > @@ -229,6 +230,10 @@ static void imx_pcie_configure_type(struct imx_pcie *imx_pcie) > > id = imx_pcie->controller_id; > > + /* If mode_mask is 0, then generic PHY driver is used to set the mode */ > + if (!drvdata->mode_mask[0]) > + return; > + > /* If mode_mask[id] is zero, means each controller have its individual gpr */ > if (!drvdata->mode_mask[id]) > id = 0; > @@ -807,7 +812,11 @@ static void imx_pcie_ltssm_enable(struct device *dev) > { > struct imx_pcie *imx_pcie = dev_get_drvdata(dev); > const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; > + u8 offset = dw_pcie_find_capability(imx_pcie->pci, PCI_CAP_ID_EXP); > + u32 tmp; > > + tmp = dw_pcie_readl_dbi(imx_pcie->pci, offset + PCI_EXP_LNKCAP); > + phy_set_speed(imx_pcie->phy, FIELD_GET(PCI_EXP_LNKCAP_SLS, tmp)); > if (drvdata->ltssm_mask) > regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask, > drvdata->ltssm_mask); > @@ -820,6 +829,7 @@ static void imx_pcie_ltssm_disable(struct device *dev) > struct imx_pcie *imx_pcie = dev_get_drvdata(dev); > const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; > > + phy_set_speed(imx_pcie->phy, 0); > if (drvdata->ltssm_mask) > regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, > drvdata->ltssm_mask, 0); > @@ -955,6 +965,12 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) > goto err_clk_disable; > } > > + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); > + if (ret) { > + dev_err(dev, "unable to set PCIe PHY mode\n"); > + goto err_phy_off; 'err_phy_off' should power off the PHY, right? But this label is used to do phy_exit() which is wrong. Please rename this label to err_phy_exit and also use _this_ label to power off the PHY after the failures of phy_power_on(). Right now, PHY is never turned off in error path. - Mani
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 57814a0cfab8c..c72c7a0b0e02d 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -29,6 +29,7 @@ #include <linux/types.h> #include <linux/interrupt.h> #include <linux/reset.h> +#include <linux/phy/pcie.h> #include <linux/phy/phy.h> #include <linux/pm_domain.h> #include <linux/pm_runtime.h> @@ -229,6 +230,10 @@ static void imx_pcie_configure_type(struct imx_pcie *imx_pcie) id = imx_pcie->controller_id; + /* If mode_mask is 0, then generic PHY driver is used to set the mode */ + if (!drvdata->mode_mask[0]) + return; + /* If mode_mask[id] is zero, means each controller have its individual gpr */ if (!drvdata->mode_mask[id]) id = 0; @@ -807,7 +812,11 @@ static void imx_pcie_ltssm_enable(struct device *dev) { struct imx_pcie *imx_pcie = dev_get_drvdata(dev); const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; + u8 offset = dw_pcie_find_capability(imx_pcie->pci, PCI_CAP_ID_EXP); + u32 tmp; + tmp = dw_pcie_readl_dbi(imx_pcie->pci, offset + PCI_EXP_LNKCAP); + phy_set_speed(imx_pcie->phy, FIELD_GET(PCI_EXP_LNKCAP_SLS, tmp)); if (drvdata->ltssm_mask) regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask, drvdata->ltssm_mask); @@ -820,6 +829,7 @@ static void imx_pcie_ltssm_disable(struct device *dev) struct imx_pcie *imx_pcie = dev_get_drvdata(dev); const struct imx_pcie_drvdata *drvdata = imx_pcie->drvdata; + phy_set_speed(imx_pcie->phy, 0); if (drvdata->ltssm_mask) regmap_update_bits(imx_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask, 0); @@ -955,6 +965,12 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp) goto err_clk_disable; } + ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC); + if (ret) { + dev_err(dev, "unable to set PCIe PHY mode\n"); + goto err_phy_off; + } + ret = phy_power_on(imx_pcie->phy); if (ret) { dev_err(dev, "waiting for PHY ready timeout!\n");
Invoke the common PHY API to configure mode, speed, and submode. While these functions are optional in the PHY interface, they are necessary for certain PHY drivers. Lack of support for these functions in a PHY driver does not cause harm. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)