Message ID | 20240729123538.175704-5-afd@ti.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show
Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1113B148823 for <imx@lists.linux.dev>; Mon, 29 Jul 2024 12:36:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722256565; cv=none; b=A8WpgShEFKXU/RAbm768lWUPR5tp9WFY8fSMK5ENGOQMKS8F95kXQrUdR3Y1/VfB0c3ODFHtGdMAf469rl7HdWpOd+2LSC+AYsDBQ9YMq8oI/YZFbEinWc9jnt4Bc840S+Pbd9E0o7u68qiL8xYUp+M6enJPx89xTlzRWORovS0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722256565; c=relaxed/simple; bh=OrOOVZOi7hgZ+QYb0v+8cUzWivlrkTyEsuHguCWPCxE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eiBH0QRiZUBXLBSjYtLJEwoysDunowzW0wE/4YEnUfQRJmR2j0dGD+7nT1oyGHJfFr0Vh0TcEkImRDiasR5J3LpVL4+H7NIZTfKmN9csuwydmgJhuHb4BVaN/vvFflvQpxDVmgZEwndrx0pa/Z49mb9I6FlVMU+PKYffHI3rYPk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=JkT0KEzE; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="JkT0KEzE" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 46TCZh46067703; Mon, 29 Jul 2024 07:35:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722256543; bh=K/+qRdkVMeBzBovWVEq3ErsEaf52H0JO+RGDHvNB1ZI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JkT0KEzEeet4VIor7VndB/WoEfokTyMuLnc/8UFrJzW9IHoipRnhprM963Bgp9/GI wdAFKEPnPEaEBGu5OgQNjegPhUK+TLBnBNz69+CzBGXdv4P6lJV3SjJtEq+WPcHJSn R5LK2ovP8uXNIIySG2n8QHBRvu8awGWjJ00D/kM0= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 46TCZhl3011553 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Jul 2024 07:35:43 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 29 Jul 2024 07:35:42 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 29 Jul 2024 07:35:42 -0500 Received: from fllvsmtp7.itg.ti.com ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 46TCZd0l128014; Mon, 29 Jul 2024 07:35:42 -0500 From: Andrew Davis <afd@ti.com> To: Andre Przywara <andre.przywara@arm.com>, Russell King <linux@armlinux.org.uk>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, Andrew Lunn <andrew@lunn.ch>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement <gregory.clement@bootlin.com>, Daniel Mack <daniel@zonque.org>, Haojian Zhuang <haojian.zhuang@gmail.com>, Robert Jarzmik <robert.jarzmik@free.fr> CC: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <imx@lists.linux.dev>, Andrew Davis <afd@ti.com> Subject: [PATCH v2 4/7] ARM: pxa: Switch to new sys-off handler API Date: Mon, 29 Jul 2024 07:35:35 -0500 Message-ID: <20240729123538.175704-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240729123538.175704-1-afd@ti.com> References: <20240729123538.175704-1-afd@ti.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: <imx.lists.linux.dev> List-Subscribe: <mailto:imx+subscribe@lists.linux.dev> List-Unsubscribe: <mailto:imx+unsubscribe@lists.linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 |
Series |
Switch more ARM plats to sys-off handler API
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expand
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diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 452bf7aac1fad..c8db4eec59465 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -1041,7 +1041,7 @@ static void __init spitz_init(void) software_node_register(&spitz_scoop_2_gpiochip_node); init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); - pm_power_off = spitz_poweroff; + register_platform_power_off(spitz_poweroff); PMCR = 0x00;
Kernel now supports chained power-off handlers. Use register_platform_power_off() that registers a platform level power-off handler. Legacy pm_power_off() will be removed once all drivers and archs are converted to the new sys-off API. Signed-off-by: Andrew Davis <afd@ti.com> --- arch/arm/mach-pxa/spitz.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)